BibSLEIGH — VHDL & Verilog Compared & Contrasted — Plus Modeled Example Written in VHDL, Verilog and C

Douglas J. Smith
VHDL & Verilog Compared & Contrasted — Plus Modeled Example Written in VHDL, Verilog and C
DAC, 1996.

DAC 1996

@inproceedings{DAC-1996-Smith,
	author        = "Douglas J. Smith",
	booktitle     = "{Proceedings of the 33rd Design Automation Conference}",
	doi           = "10.1145/240518.240664",
	isbn          = "0-89791-779-0",
	pages         = "771--776",
	publisher     = "{ACM Press}",
	title         = "{VHDL & Verilog Compared & Contrasted — Plus Modeled Example Written in VHDL, Verilog and C}",
	year          = 1996,
}

Douglas J. SmithVHDL & Verilog Compared & Contrasted — Plus Modeled Example Written in VHDL, Verilog and CDAC, 1996.

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Douglas J. Smith
VHDL & Verilog Compared & Contrasted — Plus Modeled Example Written in VHDL, Verilog and C
DAC, 1996.