Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis
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Jieru Zhao, Tingyuan Liang, Sharad Sinha, Wei Zhang 0012
Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis
DATE, 2019.

DATE 2019
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@inproceedings{DATE-2019-ZhaoLSZ,
	author        = "Jieru Zhao and Tingyuan Liang and Sharad Sinha and Wei Zhang 0012",
	booktitle     = "{Proceedings of the 23rd Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.23919/DATE.2019.8714724",
	isbn          = "978-3-9819263-2-3",
	pages         = "1130--1135",
	publisher     = "{IEEE}",
	title         = "{Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis}",
	year          = 2019,
}


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