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Travelled to:
1 × USA
Collaborated with:
S.A.Taylor M.Quinn D.Brown N.Dohm S.Hildebrandt J.Huggins
Talks about:
alpha (2) microprocessor (1) superscalar (1) processor (1) function (1) multipl (1) verif (1) order (1) issu (1) out (1)

Person: Carl Ramey

DBLP DBLP: Ramey:Carl

Contributed to:

DAC 19981998

Wrote 1 papers:

DAC-1998-TaylorQBDHHR #functional #multi #verification
Functional Verification of a Multiple-issue, Out-of-Order, Superscalar Alpha Processor — The DEC Alpha 21264 Microprocessor (SAT, MQ, DB, ND, SH, JH, CR), pp. 638–643.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.