Travelled to:1 × Germany
2 × USA
Collaborated with:S.P.Khatri C.Nagpal N.Jayakumar G.Mallarapu G.Choi B.Gamache
Talks about:design (4) approach (3) radiat (2) digit (2) hard (2) subthreshold (1) micropipelin (1) asynchron (1) electron (1) shifter (1)
Person: Rajesh Garg
DBLP: Garg:Rajesh
Contributed to:
2008
20082006Wrote 5 papers:
- DAC-2008-GargNK #design #performance
- A fast, analytical estimator for the SEU-induced pulse width in combinational designs (RG, CN, SPK), pp. 918–923.
- DATE-2008-GargMK
- A Single-supply True Voltage Level Shifter (RG, GM, SPK), pp. 979–984.
- DATE-2008-NagpalGK #approach #design #using
- A Delay-efficient Radiation-hard Digital Design Approach Using CWSP Elements (CN, RG, SPK), pp. 354–359.
- DAC-2006-GargJKC #approach #design
- A design approach for radiation-hard digital electronics (RG, NJ, SPK, GC), pp. 773–778.
- DAC-2006-JayakumarGGK #approach #design
- A PLA based asynchronous micropipelining approach for subthreshold circuit design (NJ, RG, BG, SPK), pp. 419–424.