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Travelled to:
1 × France
Collaborated with:
J.Schietke
Talks about:
processor (1) perform (1) chipset (1) analysi (1) optim (1) time (1) high (1) cmos (1)

Person: Uwe Fassnacht

DBLP DBLP: Fassnacht:Uwe

Contributed to:

DATE 19981998

Wrote 1 papers:

DATE-1998-FassnachtS #analysis #optimisation
Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset (UF, JS), pp. 325–331.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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