BibSLEIGH
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Used together with:
catch (1)
up (1)
tool (1)
vlsi (1)
will (1)

Stem disign$ (all stems)

1 papers:

DACDAC-1979-Giuliani #design #tool support
Will Disign tools catch up to VLSI design (DG), pp. 544–545.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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