Travelled to:1 × France
Collaborated with:J.Liu M.Hong K.T.Do J.Park M.Kumar M.Kumar N.Tripathi A.Ranjan
Talks about:clock (2) sequenti (1) domain (1) cross (1) gate (1) awar (1)
Person: Jung Yun Choi
DBLP: Choi:Jung_Yun
Contributed to:
2015Wrote 1 papers:
- DATE-2015-LiuHDCPKKTR
- Clock domain crossing aware sequential clock gating (JL, MSH, KTD, JYC, JP, MK, MK, NT, AR), pp. 1–6.