A proper model for the partitioning of electrical circuits
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Daniel G. Schweikert, Brian W. Kernighan
A proper model for the partitioning of electrical circuits
DAC, 1972.

DAC 1972
DBLP
Scholar
DOI
Full names Links ISxN
@inproceedings{DAC-1972-SchweikertK,
	author        = "Daniel G. Schweikert and Brian W. Kernighan",
	booktitle     = "{Proceedings of the Ninth Design Automation Workshop}",
	doi           = "10.1145/800153.804930",
	pages         = "57--62",
	publisher     = "{ACM}",
	title         = "{A proper model for the partitioning of electrical circuits}",
	year          = 1972,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.