The Constrained Via Minimization Problem for PCB and VLSI Design
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Xiao-Ming Xiong, Ernest S. Kuh
The Constrained Via Minimization Problem for PCB and VLSI Design
DAC, 1988.

DAC 1988
DBLP
Scholar
Full names Links ISxN
@inproceedings{DAC-1988-XiongK,
	acmid         = "285730.285823",
	author        = "Xiao-Ming Xiong and Ernest S. Kuh",
	booktitle     = "{Proceedings of the 25th Design Automation Conference}",
	pages         = "573--578",
	publisher     = "{ACM}",
	title         = "{The Constrained Via Minimization Problem for PCB and VLSI Design}",
	year          = 1988,
}

Tags:



Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.