Yuichi Nakamura, Takeshi Yoshimura
A Partitioning-Based Logic Optimization Method for Large Scale Circuits with Boolean Matrix
DAC, 1995.
@inproceedings{DAC-1995-NakamuraY,
author = "Yuichi Nakamura and Takeshi Yoshimura",
booktitle = "{Proceedings of the 32nd Design Automation Conference}",
doi = "10.1145/217474.217605",
isbn = "0-89791-725-1",
pages = "653--657",
publisher = "{ACM Press}",
title = "{A Partitioning-Based Logic Optimization Method for Large Scale Circuits with Boolean Matrix}",
year = 1995,
}











