Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems
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Ayse K. Coskun, Anjun Gu, Warren Jin 0002, Ajay Joshi, Andrew B. Kahng, Jonathan Klamkin, Yenai Ma, John Recchio, Vaishnav Srinivas, Tiansheng Zhang
Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems
DATE, 2016.

DATE 2016
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@inproceedings{DATE-2016-CoskunGJJKKMRSZ,
	author        = "Ayse K. Coskun and Anjun Gu and Warren Jin 0002 and Ajay Joshi and Andrew B. Kahng and Jonathan Klamkin and Yenai Ma and John Recchio and Vaishnav Srinivas and Tiansheng Zhang",
	booktitle     = "{Proceedings of the 20th Conference and Exhibition on Design, Automation and Test in Europe}",
	ee            = "http://ieeexplore.ieee.org/document/7459512/",
	isbn          = "978-3-9815-3707-9",
	pages         = "1309--1314",
	publisher     = "{IEEE}",
	title         = "{Cross-layer floorplan optimization for silicon photonic NoCs in many-core systems}",
	year          = 2016,
}


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