The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA
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Matthew Naylor, Colin Runciman
The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA
IFL, 2007.

IFL 2007
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@inproceedings{IFL-2007-NaylorR,
	author        = "Matthew Naylor and Colin Runciman",
	booktitle     = "{Revised Selected Papers of the 19th International Workshop on Implementation and Application of Functional Languages}",
	doi           = "10.1007/978-3-540-85373-2_8",
	isbn          = "978-3-540-85372-5",
	pages         = "129--146",
	publisher     = "{Springer International Publishing}",
	series        = "{Lecture Notes in Computer Science}",
	title         = "{The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA}",
	volume        = 5083,
	year          = 2007,
}

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