4 papers:
DATE-2014-PalitSHHNN #architecture #case study- Impact of steep-slope transistors on non-von Neumann architectures: CNN case study (IP, BS, AH, XSH, JN, MTN), pp. 1–6.
LICS-2012-BienvenuM #revisited- Von Neumann’s Biased Coin Revisited (LB, BM), pp. 145–154.
IFL-2007-NaylorR #graph #reduction #using- The Reduceron: Widening the von Neumann Bottleneck for Graph Reduction Using an FPGA (MN, CR), pp. 129–146.
POPL-1996-BirkedalTV #representation- From Region Inference to von Neumann Machines via Region Representation Inference (LB, MT, MV), pp. 171–183.
