Travelled to:1 × Austria
1 × China
1 × Germany
1 × Ireland
1 × Italy
1 × Singapore
1 × USA
2 × France
Collaborated with:T.Toben A.Podelski D.Dietsch B.Wachter S.F.Arenis C.Herrera J.Bauer W.Damm J.Klose H.Wittke I.Schinz C.Mrugalla M.Muñiz A.S.Andisha
Talks about:verif (6) formal (3) standard (2) industri (2) sequenc (2) system (2) chart (2) more (2) live (2) constraint (1)
Person: Bernd Westphal
DBLP: Westphal:Bernd
Contributed to:
2014
20142011
2011
2007
2007
2006
2006
2004Wrote 9 papers:
- FM-2014-ArenisWDMA #consistency #industrial #standard #verification
- The Wireless Fire Alarm System: Ensuring Conformance to Industrial Standards through Formal Verification (SFA, BW, DD, MM, ASA), pp. 658–672.
- TACAS-2014-HerreraWP #network #query #reduction
- Quasi-Equal Clock Reduction: More Networks, More Queries (CH, BW, AP), pp. 295–309.
- FM-2011-DietschWP #verification
- System Verification through Program Verification (DD, BW, AP), pp. 27–41.
- RE-2011-DietschAWP #ambiguity #formal method #industrial #standard #visual notation
- Disambiguation of industrial standards through formalization and graphical languages (DD, SFA, BW, AP), pp. 265–270.
- AGTIVE-2007-BauerDTW #analysis #constraints #ocl #synthesis #verification
- Verification and Synthesis of OCL Constraints Via Topology Analysis (JB, WD, TT, BW), pp. 361–376.
- VMCAI-2007-WachterW #principle
- The Spotlight Principle (BW, BW), pp. 182–198.
- CAV-2006-KloseTWW #performance #sequence chart #verification
- Check It Out: On the Efficient Formal Verification of Live Sequence Charts (JK, TT, BW, HW), pp. 219–233.
- FASE-2006-WestphalT #sequence chart
- The Good, the Bad and the Ugly: Well-Formedness of Live Sequence Charts (BW, TT), pp. 230–246.
- SEFM-2004-SchinzTMW #uml #verification
- The Rhapsody UML Verification Environment (IS, TT, CM, BW), pp. 174–183.