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Travelled to:
1 × Germany
Collaborated with:
A.M.Amory M.Lubaszewski F.G.Moraes
Talks about:
architectur (1) processor (1) network (1) multipl (1) reduct (1) time (1) test (1) reus (1) chip (1) base (1)

Person: Edson I. Moreno

DBLP DBLP: Moreno:Edson_I=

Contributed to:

DATE 20052005

Wrote 1 papers:

DATE-2005-AmoryLMM #architecture #multi #reduction #reuse
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture (AMA, ML, FGM, EIM), pp. 62–63.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.