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Travelled to:
2 × USA
Collaborated with:
I.Huang W.Huang C.Lai C.Kao
Talks about:
trace (2) microprocessor (1) interrupt (1) instruct (1) compress (1) behavior (1) program (1) automat (1) extern (1) effici (1)

Person: Fu-Ching Yang

DBLP DBLP: Yang:Fu=Ching

Contributed to:

DAC 20092009
DAC 20072007

Wrote 2 papers:

DAC-2009-LaiYKH #performance #realtime
A trace-capable instruction cache for cost efficient real-time program trace compression in SoC (CHL, FCY, CFK, IJH), pp. 136–141.
DAC-2007-YangHH #automation #behaviour #design #verification
Automatic Verification of External Interrupt Behaviors for Microprocessor Design (FCY, WKH, IJH), pp. 896–901.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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