BibSLEIGH
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Travelled to:
1 × Germany
Collaborated with:
S.Pomata P.Meloni L.Raffo M.Lindwer
Talks about:
translat (1) exploit (1) explor (1) design (1) binari (1) space (1) fpgas (1) fast (1) asip (1)

Person: Giuseppe Tuveri

DBLP DBLP: Tuveri:Giuseppe

Contributed to:

DATE 20122012

Wrote 1 papers:

DATE-2012-PomataMTRL #design #performance
Exploiting binary translation for fast ASIP design space exploration on FPGAs (SP, PM, GT, LR, ML), pp. 566–569.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.