Travelled to:2 × Germany
Collaborated with:L.Raffo S.Pomata G.Tuveri M.Lindwer F.Angiolini S.Carta L.Benini
Talks about:interconnect (1) translat (1) contrast (1) exploit (1) tradit (1) layout (1) fabric (1) explor (1) design (1) binari (1)
Person: Paolo Meloni
DBLP: Meloni:Paolo
Contributed to:
20122006Wrote 2 papers:
- DATE-2012-PomataMTRL #design #performance
- Exploiting binary translation for fast ASIP design space exploration on FPGAs (SP, PM, GT, LR, ML), pp. 566–569.
- DATE-2006-AngioliniMCBR #layout
- Contrasting a NoC and a traditional interconnect fabric with layout awareness (FA, PM, SC, LB, LR), pp. 124–129.