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Travelled to:
1 × USA
3 × Germany
Collaborated with:
M.Pedram S.Nazarian S.Abbaspour A.Iranli B.Amelifard S.Hatami
Talks about:
statist (2) current (2) analysi (2) model (2) logic (2) cell (2) interconnect (1) histogram (1) backlight (1) gaussian (1)

Person: Hanif Fatemi

DBLP DBLP: Fatemi:Hanif

Contributed to:

DATE 20082008
DAC 20062006
DATE 20062006
DATE 20052005

Wrote 4 papers:

DATE-2008-AmelifardHFP #logic #multi #stack
A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect (BA, SH, HF, MP), pp. 568–573.
DAC-2006-FatemiNP #analysis #logic #statistics #using
Statistical logic cell delay analysis using a current-based model (HF, SN, MP), pp. 253–256.
DATE-2006-AbbaspourFP #analysis #statistics
Non-gaussian statistical interconnect timing analysis (SA, HF, MP), pp. 533–538.
DATE-2005-IranliFP #named #scalability
HEBS: Histogram Equalization for Backlight Scaling (AI, HF, MP), pp. 346–351.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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