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Travelled to:
1 × USA
Collaborated with:
C.Hernández J.Abella D.d.Andrés J.C.Ruiz
Talks about:
microcontrol (1) instruct (1) automot (1) analysi (1) robust (1) correl (1) verif (1) simul (1) set (1) rtl (1)

Person: Jaime Espinosa

DBLP DBLP: Espinosa:Jaime

Contributed to:

DAC 20152015

Wrote 1 papers:

DAC-2015-EspinosaHAAR #analysis #correlation #robust #set #verification
Analysis and RTL correlation of instruction set simulators for automotive microcontroller robustness verification (JE, CH, JA, DdA, JCR), p. 6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.