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Travelled to:
1 × USA
Collaborated with:
A.Goryachev
Talks about:
processor (1) function (1) mainlin (1) verif (1) today (1) chip (1) non (1)

Person: Johannes Koesters

DBLP DBLP: Koesters:Johannes

Contributed to:

DAC 20142014

Wrote 1 papers:

DAC-2014-KoestersG #verification
Verification of Non-Mainline Functions in Todays Processor Chips (JK, AG), p. 3.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.