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Travelled to:
1 × France
Collaborated with:
E.Cerny
Talks about:
constraint (1) interfac (1) program (1) correl (1) verif (1) logic (1) delay (1) time (1) use (1)

Person: Pierre Girodias

DBLP DBLP: Girodias:Pierre

Contributed to:

ED&TC 19971997

Wrote 1 papers:

EDTC-1997-GirodiasC #constraints #correlation #interface #logic programming #using #verification
Interface timing verification with delay correlation using constraint logic programming (PG, EC), pp. 12–19.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.