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Travelled to:
1 × USA
Collaborated with:
V.Tiwari D.Singh S.Rajgopal G.Mehta F.Baez
Talks about:
microprocessor (1) perform (1) reduc (1) power (1) high (1)

Person: Rakesh Patel

DBLP DBLP: Patel:Rakesh

Contributed to:

DAC 19981998

Wrote 1 papers:

DAC-1998-TiwariSRMPB
Reducing Power in High-Performance Microprocessors (VT, DS, SR, GM, RP, FB), pp. 732–737.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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