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Travelled to:
1 × France
Collaborated with:
C.M.Lopez S.Musa C.Bartic G.G.E.Gielen W.Eberle
Talks about:
systemat (1) programm (1) interfac (1) record (1) neural (1) design (1) activ (1) nois (1) cmos (1) cell (1)

Person: Robert Puers

DBLP DBLP: Puers:Robert

Contributed to:

DATE 20112011

Wrote 1 papers:

DATE-2011-LopezMBPGE #design #interface #process #programmable
Systematic design of a programmable low-noise CMOS neural interface for cell activity recording (CML, SM, CB, RP, GGEG, WE), pp. 818–823.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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