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Travelled to:
1 × USA
Collaborated with:
T.Hattori Y.Nitta M.Seki S.Narita K.Uchiyama T.Takahashi
Talks about:
microprocessor (1) superscalar (1) methodolog (1) design (1)

Person: Ryuichi Satomura

DBLP DBLP: Satomura:Ryuichi

Contributed to:

DAC 19981998

Wrote 1 papers:

DAC-1998-HattoriNSNUTS #design
Design Methodology of a 200MHz Superscalar Microprocessor: SH-4 (TH, YN, MS, SN, KU, TT, RS), pp. 246–249.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.