BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
2 × USA
Collaborated with:
S.Kojima O.Yamashiro K.Eguchi H.Fukuda T.Hattori Y.Nitta M.Seki S.Narita K.Uchiyama R.Satomura
Talks about:
microprocessor (1) superscalar (1) methodolog (1) thevenin (1) network (1) equival (1) modifi (1) design (1) simul (1) model (1)

Person: Tsuyoshi Takahashi

DBLP DBLP: Takahashi:Tsuyoshi

Contributed to:

DAC 19981998
DAC 19841984

Wrote 2 papers:

DAC-1998-HattoriNSNUTS #design
Design Methodology of a 200MHz Superscalar Microprocessor: SH-4 (TH, YN, MS, SN, KU, TT, RS), pp. 246–249.
DAC-1984-TakahashiKYEF #logic #network #simulation
An MOS digital network model on a modified thevenin equivalent for logic simulation (TT, SK, OY, KE, HF), pp. 549–555.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.