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Travelled to:
1 × Taiwan
Collaborated with:
J.Wu C.Chien
Talks about:
semiconductor (1) multistag (1) inventori (1) analysi (1) surviv (1) memori (1) model (1) base (1)

Person: Yi-Chi Tsou

DBLP DBLP: Tsou:Yi=Chi

Contributed to:

CASE 20142014

Wrote 1 papers:

CASE-2014-WuCT #analysis #memory management #modelling #multi
Multistage semiconductor memory inventory model based on survival analysis (JZW, CFC, YCT), pp. 613–618.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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