Tag #memory management
1705 papers:
- PADL-2020-ElsmanH #garbage collection #ml #on the
- On the Effects of Integrating Region-Based Memory Management and Generational Garbage Collection in ML (ME, NH), pp. 95–112.
- POPL-2020-DangJKD
- RustBelt meets relaxed memory (HHD, JHJ, JOK, DD), p. 29.
- POPL-2020-MathurMKMV #safety #source code
- Deciding memory safety for single-pass heap-manipulating programs (UM, AM, PK, PM, MV0), p. 29.
- POPL-2020-MeyerW #data type #lifecycle #pointer
- Pointer life cycle types for lock-free data structures with memory reclamation (RM0, SW), p. 36.
- ASPLOS-2020-0001SWWKK #debugging #detection #persistent #source code
- Cross-Failure Bug Detection in Persistent Memory Programs (SL0, KS, YW, TFW, AK, SK), pp. 1187–1202.
- ASPLOS-2020-AyersLKR #data access
- Classifying Memory Access Patterns for Prefetching (GA, HL, CK, PR), pp. 513–526.
- ASPLOS-2020-ChenLYWWS #named #performance #persistent
- FlatStore: An Efficient Log-Structured Key-Value Storage Engine for Persistent Memory (YC, YL, FY, QW, YW, JS), pp. 1077–1091.
- ASPLOS-2020-HanelAXKL #abstraction #data-driven #named #streaming
- Vortex: Extreme-Performance Memory Abstractions for Data-Intensive Streaming Applications (CH, AA, DX, JK, DL), pp. 623–638.
- ASPLOS-2020-HariaHS #named #order #persistent
- MOD: Minimally Ordered Durable Datastructures for Persistent Memory (SH, MDH, MMS), pp. 775–788.
- ASPLOS-2020-HildebrandKTLA #automation #integer #linear #named #programming #using
- AutoTM: Automatic Tensor Movement in Heterogeneous Memory Systems using Integer Linear Programming (MH, JK, ST, JLP, VA), pp. 875–890.
- ASPLOS-2020-HuangJ0 #gpu #learning #named
- SwapAdvisor: Pushing Deep Learning Beyond the GPU Memory Limit via Smart Swapping (CCH, GJ, JL0), pp. 1341–1355.
- ASPLOS-2020-KimSGHK
- Batch-Aware Unified Memory Management in GPUs for Irregular Workloads (HK, JS, PG, RH, HK), pp. 1357–1370.
- ASPLOS-2020-Kokologiannakis #hardware #model checking #modelling #named
- HMC: Model Checking for Hardware Memory Models (MK, VV), pp. 1157–1171.
- ASPLOS-2020-LockermanFBSG0B #named
- Livia: Data-Centric Computing Throughout the Memory Hierarchy (EL, AF, MB, AS, SG, DS0, NB), pp. 417–433.
- ASPLOS-2020-MaasAIJMR #c++
- Learning-based Memory Allocation for C++ Server Workloads (MM, DGA, MI, MMJ, KSM, CR), pp. 541–556.
- ASPLOS-2020-PengSD0MXYQ #gpu #learning #named
- Capuchin: Tensor-based GPU Memory Management for Deep Learning (XP, XS, HD, HJ0, WM, QX, FY, XQ), pp. 891–905.
- ASPLOS-2020-RamanathanKMFDM #transaction
- Durable Transactional Memory Can Scale with Timestone (MKR, JK, AM, XF, AD, CM, SK), pp. 335–349.
- ASPLOS-2020-SkarlatosKXT #parallel
- Elastic Cuckoo Page Tables: Rethinking Virtual Memory Translation for Parallelism (DS, AK, TX, JT), pp. 1093–1108.
- ASPLOS-2020-TovletoglouMNK #energy #named
- HaRMony: Heterogeneous-Reliability Memory and QoS-Aware Energy Management on Virtualized Servers (KT, LM, DSN, GK), pp. 575–590.
- ASPLOS-2020-XuSS #named #performance #persistent #reduction #security
- MERR: Improving Security of Persistent Memory Objects via Efficient Memory Exposure Reduction and Randomization (YX, YS, XS), pp. 987–1000.
- ASPLOS-2020-ZhangBBBL #architecture #consistency #named
- Peacenik: Architecture Support for Not Failing under Fail-Stop Memory Consistency (RZ, SB, VB, MDB, BL), pp. 317–333.
- CGO-2020-VermaKPR #concurrent #debugging #interactive #modelling #source code
- Interactive debugging of concurrent programs under relaxed memory models (AV, PKK, AP, SR), pp. 68–80.
- CGO-2020-WangYZM #hardware #performance #scalability #transaction
- Efficient and scalable cross-ISA virtualization of hardware transactional memory (WW, PCY, AZ, SM), pp. 107–120.
- FM-2019-SmithCM #data flow #modelling #security
- Value-Dependent Information-Flow Security on Weak Memory Models (GS, NC, TM), pp. 539–555.
- CIKM-2019-ChengHLWLC
- Deploying Hash Tables on Die-Stacked High Bandwidth Memory (XC, BH, EL, WW, SL, XC), pp. 239–248.
- CIKM-2019-SongCZX #network #recommendation
- Session-based Recommendation with Hierarchical Memory Networks (BS, YC, WZ, CX), pp. 2181–2184.
- CIKM-2019-YuanWLWHX #overview #predict #rating
- Neural Review Rating Prediction with User and Product Memory (ZY, FW, JL, CW, YH, XX0), pp. 2341–2344.
- ICML-2019-0001MZLK #adaptation #approximate #complexity #streaming
- Submodular Streaming in All Its Glory: Tight Approximation, Minimum Memory and Low Adaptive Complexity (EK0, MM, MZ, SL, AK), pp. 3311–3320.
- ICML-2019-AletJVRLK #adaptation #graph #network
- Graph Element Networks: adaptive, structured computation and memory (FA, AKJ, MBV, AR, TLP, LPK), pp. 212–222.
- ICML-2019-BarrosPW #personalisation #recognition
- A Personalized Affective Memory Model for Improving Emotion Recognition (PVAB, GIP, SW), pp. 485–494.
- ICML-2019-Greaves-Tunnell #music #statistics
- A Statistical Investigation of Long Memory in Language and Music (AGT, ZH), pp. 2394–2403.
- ICML-2019-HavivRB #comprehension #network
- Understanding and Controlling Memory in Recurrent Neural Networks (DH, AR, OB), pp. 2663–2671.
- ICML-2019-SunBD0M
- Contextual Memory Trees (WS, AB, HDI, JL0, PM), pp. 6026–6035.
- KDD-2019-Tao0WFYZ0 #modelling #named #semantics #towards
- Log2Intent: Towards Interpretable User Modeling via Recurrent Semantics Memory Unit (ZT, SL0, ZW, CF, LY, HZ, YF0), pp. 1055–1063.
- KDD-2019-ZhouMZ #network #personalisation #recommendation #topic
- Topic-Enhanced Memory Networks for Personalised Point-of-Interest Recommendation (XZ, CM, ZZ), pp. 3018–3028.
- ECOOP-2019-SpringerM #named #object-oriented #parallel #performance #programming
- DynaSOAr: A Parallel Memory Allocator for Object-Oriented Programming on GPUs with Efficient Memory Access (MS, HM), p. 37.
- PLDI-2019-PowersTB0 #c #c++ #named
- Mesh: compacting memory management for C/C++ applications (BP, DT, EDB, AM0), pp. 333–346.
- PLDI-2019-WangCCZVML0X #big data #hybrid #named
- Panthera: holistic memory management for big data processing over hybrid memories (CW, HC, TC, JZ, HV0, OM, FL, XF0, GHX), pp. 347–362.
- POPL-2019-MeyerW #data type #static analysis
- Decoupling lock-free data structures from memory reclamation for static analysis (RM0, SW), p. 31.
- POPL-2019-PodkopaevLV #hardware #modelling #programming language
- Bridging the gap between programming languages and hardware weak memory models (AP, OL, VV), p. 31.
- POPL-2019-RaadDRLV #concurrent #consistency #correctness #declarative #library #modelling #on the #specification #verification
- On library correctness under weak memory consistency: specifying and verifying concurrent libraries under declarative consistency models (AR, MD, LR, OL, VV), p. 31.
- ASE-2019-Nowack #execution #in memory #representation #symbolic computation
- Fine-Grain Memory Object Representation in Symbolic Execution (MN), pp. 912–923.
- ASE-2019-WangC00S #analysis #fault #named #pointer
- TsmartGP: A Tool for Finding Memory Defects with Pointer Analysis (YW, GC, MZ0, MG0, JS), pp. 1170–1173.
- ESEC-FSE-2019-CaiZMYHSL #concurrent #detection
- Detecting concurrency memory corruption vulnerabilities (YC, BZ, RM, HY, LH, PS, BL0), pp. 706–717.
- ESEC-FSE-2019-KapusC #execution #symbolic computation
- A segmented memory model for symbolic execution (TK, CC), pp. 774–784.
- ESEC-FSE-2019-WangXLLLQLL #layout
- Locating vulnerabilities in binaries via memory layout recovering (HW, XX, SWL, YL0, YL, SQ, YL0, TL0), pp. 718–728.
- ICSE-2019-FanWS0ZZ #detection #named #scalability
- Smoke: scalable path-sensitive memory leak detection for millions of lines of code (GF, RW, QS, XX0, JZ, CZ), pp. 72–82.
- GPCE-2019-CronburgG #in memory #layout #named
- Floorplan: spatial layout in memory management systems (KC, SZG), pp. 81–93.
- ASPLOS-2019-0001WZKK #flexibility #framework #named #performance #persistent #source code #testing
- PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs (SL0, YW, JZ, AK, SMK), pp. 411–425.
- ASPLOS-2019-0015ARZMGY #framework
- A Framework for Memory Oversubscription Management in Graphics Processing Units (CL0, RA, CJR, YZ, OM, YG0, JY0), pp. 49–63.
- ASPLOS-2019-JinH #named #network #optimisation
- Split-CNN: Splitting Window-based Operations in Convolutional Neural Networks for Memory System Optimization (TJ, SH), pp. 835–847.
- ASPLOS-2019-Lagar-CavillaAS
- Software-Defined Far Memory in Warehouse-Scale Computers (HALC, JA, SS, NA, RB, SB, JC, AC, ND, JS, GT, KAY, YZ, PR), pp. 317–330.
- ASPLOS-2019-LustigSG #analysis #consistency #formal method
- A Formal Analysis of the NVIDIA PTX Memory Consistency Model (DL, SS, OG), pp. 257–270.
- ASPLOS-2019-MiaoJPML #hybrid #named
- StreamBox-HBM: Stream Analytics on High Bandwidth Hybrid Memory (HM, MJ, GP, KSM, FXL), pp. 167–181.
- ASPLOS-2019-Tsai0
- Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy (PAT, DS0), pp. 229–242.
- ASPLOS-2019-XuKMS #performance #persistent
- Finding and Fixing Performance Pathologies in Persistent Memory Software Stacks (JX0, JK, AM, SS), pp. 427–439.
- ASPLOS-2019-YanLNB
- Nimble Page Management for Tiered Memory Systems (ZY, DL, DWN, AB), pp. 331–345.
- ASPLOS-2019-ZhangLJ #named #safety
- BOGO: Buy Spatial Memory Safety, Get Temporal Memory Safety (Almost) Free (TZ, DL, CJ), pp. 631–644.
- CASE-2019-SteffenHKWURRD
- Creating an Obstacle Memory Through Event-Based Stereo Vision and Robotic Proprioception (LS, BH, JK, JW, SU, DR, AR, RD), pp. 1829–1836.
- ESOP-2019-KuruG
- Safe Deferred Memory Reclamation with Types (IK0, CSG), pp. 88–116.
- FASE-2019-BezirgiannisBJP #case study #implementation #manycore
- Implementing SOS with Active Objects: A Case Study of a Multicore Memory System (NB, FSdB, EBJ, KIP, SLTT), pp. 332–350.
- CAV-2019-GavrilenkoLFHM #analysis #encoding #modelling #smt
- BMC for Weak Memory Models: Relation Analysis for Compact SMT Encodings (NG, HPdL, FF, KH, RM0), pp. 355–365.
- CAV-2019-ZhaoS #concurrent #reasoning
- Rely-Guarantee Reasoning About Concurrent Memory Management in Zephyr RTOS (YZ, DS), pp. 515–533.
- ICST-2019-CoppikSS #fuzzing #named #using
- MemFuzz: Using Memory Accesses to Guide Fuzzing (NC, OS, NS), pp. 48–58.
- VMCAI-2019-BallabrigaFGLR #static analysis #using
- Static Analysis of Binary Code with Memory Indirections Using Polyhedra (CB, JF, LG, GL, JR), pp. 114–135.
- VMCAI-2019-BouillaguetBSY #analysis #deduction #in memory #modelling #pointer #verification
- Exploiting Pointer Analysis in Memory Models for Deductive Verification (QB, FB, MS, BY), pp. 160–182.
- FM-2018-ColvinS #modelling #source code #verification
- A Wide-Spectrum Language for Verification of Programs on Weak Memory Models (RJC, GS), pp. 240–257.
- FM-2018-FavaSS #semantics
- Operational Semantics of a Weak Memory Model with Channel Synchronization (DSF, MS, VS), pp. 258–276.
- CIKM-2018-JangCJK #named #performance
- Zoom-SVD: Fast and Memory Efficient Method for Extracting Key Patterns in an Arbitrary Time Range (JGJ, DC, JJ, UK), pp. 1083–1092.
- CIKM-2018-LeeOFKY #matrix
- Disk-based Matrix Completion for Memory Limited Devices (DL, JO, CF, BK, HY), pp. 1093–1102.
- ICML-2018-FraccaroRZPEV #generative #modelling
- Generative Temporal Models with Spatial Memory for Partially Observed Environments (MF, DJR, YZ, AP, SMAE, FV), pp. 1544–1553.
- ICML-2018-GuHDH #algorithm #performance #probability
- Faster Derivative-Free Stochastic Algorithm for Shared Memory Machines (BG, ZH, CD, HH), pp. 1807–1816.
- ICML-2018-HashemiSSALCKR #data access #learning
- Learning Memory Access Patterns (MH, KS, JAS, GA, HL, JC, CK, PR), pp. 1924–1933.
- ICML-2018-ShazeerS #adaptation #learning #named #sublinear
- Adafactor: Adaptive Learning Rates with Sublinear Memory Cost (NS, MS), pp. 4603–4611.
- ICPR-2018-ChenLT #algorithm #approximate #detection
- An Approximate Bayesian Long Short- Term Memory Algorithm for Outlier Detection (CC, XL, GT), pp. 201–206.
- ICPR-2018-Pham0V #graph #network #predict #process
- Graph Memory Networks for Molecular Activity Prediction (TP, TT0, SV), pp. 639–644.
- KDD-2018-Le0V #learning
- Dual Memory Neural Computer for Asynchronous Two-view Sequential Learning (HL, TT0, SV), pp. 1637–1645.
- KDD-2018-LiuZMZ #named #recommendation
- STAMP: Short-Term Attention/Memory Priority Model for Session-based Recommendation (QL, YZ, RM, HZ), pp. 1831–1839.
- KDD-2018-NaKY #data type #detection #effectiveness #named #performance
- DILOF: Effective and Memory Efficient Local Outlier Detection in Data Streams (GSN, DHK, HY), pp. 1993–2002.
- KDD-2018-WangYHLWH #network #recommendation #streaming
- Neural Memory Streaming Recommender Networks with Adversarial Training (QW, HY, ZH, DL, HW, ZH), pp. 2467–2475.
- KDD-2018-ZhouNH #adaptation #education #what
- Unlearn What You Have Learned: Adaptive Crowd Teaching with Exponentially Decayed Memory Learners (YZ, ARN, JH), pp. 2817–2826.
- OOPSLA-2018-Cohen #data type
- Every data structure deserves lock-free memory reclamation (NC), p. 24.
- OOPSLA-2018-CohenAL #object-oriented
- Object-oriented recovery for non-volatile memory (NC, DTA, JRL), p. 22.
- OOPSLA-2018-RaadV #persistent #semantics
- Persistence semantics for weak memory: integrating epoch persistency with the TSO memory model (AR, VV), p. 27.
- AdaEurope-2018-MaalejTM #ada
- Safe Dynamic Memory Management in Ada and SPARK (MM, STT, YM), pp. 37–52.
- PLDI-2018-ChongSW #c++ #semantics #transaction
- The semantics of transactions and weak memory in x86, Power, ARM, and C++ (NC, TS0, JW), pp. 211–225.
- PLDI-2018-DuckY #c #c++ #detection #effectiveness #fault #named #using
- EffectiveSan: type and memory error detection using dynamically typed C/C++ (GJD, RHCY), pp. 181–195.
- PLDI-2018-VilkB #automation #debugging #named #web
- BLeak: automatically debugging memory leaks in web applications (JV, EDB), pp. 15–29.
- POPL-2018-DongolJR #architecture #transaction
- Transactions in relaxed memory architectures (BD, RJ, JR), p. 29.
- ASE-2018-LinWLSZW #concurrent #data access #debugging #named
- PFix: fixing concurrency bugs based on memory access patterns (HL, ZW, SL, JS0, DZ, GW), pp. 589–600.
- ASE-2018-Yin0LW #abstraction #constraints #modelling #refinement #scheduling
- Scheduling constraint based abstraction refinement for weak memory models (LY, WD0, WL, JW0), pp. 645–655.
- ESEC-FSE-2018-LeeHO #c #fault #named #static analysis
- MemFix: static analysis-based repair of memory deallocation errors for C (JL, SH, HO), pp. 95–106.
- ASPLOS-2018-Ausavarungnirun #concurrent #gpu #multi #named
- MASK: Redesigning the GPU Memory Hierarchy to Support Multi-Application Concurrency (RA, VM, JL, SG, JG, AJ, CJR, OM), pp. 503–518.
- ASPLOS-2018-HariaHS
- Devirtualizing Memory in Heterogeneous Systems (SH, MDH, MMS), pp. 637–650.
- ASPLOS-2018-WuZLLCZG #java #named
- Espresso: Brewing Java For More Non-Volatility with Non-volatile Memory (MW, ZZ0, HL, HL, HC, BZ, HG), pp. 70–83.
- CGO-2018-KruseG #dependence #named
- DeLICM: scalar dependence removal at zero memory cost (MK, TG), pp. 241–253.
- ESOP-2018-AguadoMPRH #approach #concurrent
- Deterministic Concurrency: A Clock-Synchronised Shared Memory Approach (JA, MM, MP, PSR, RvH), pp. 86–113.
- ESOP-2018-DoddsBG #compilation #composition #optimisation #verification
- Compositional Verification of Compiler Optimisations on Relaxed Memory (MD, MB, AG), pp. 1027–1055.
- IJCAR-2018-ConchonDZ #model checking
- Cubicle- W : Parameterized Model Checking on Weak Memory (SC, DD, FZ), pp. 152–160.
- JCDL-2017-NwalaWZAN #tool support
- Local Memory Project: Providing Tools to Build Collections of Stories for Local Events from Local Sources (ACN, MCW, ABZ, AA, MLN), pp. 219–228.
- EDM-2017-MichalenkoLB #feedback #network #personalisation #using
- Personalized Feedback for Open-Response Mathematical Questions using Long Short-Term Memory Networks (JJM, ASL, RGB).
- SANER-2017-JezekL #case study
- Antipatterns causing memory bloat: A case study (KJ, RL), pp. 306–315.
- SANER-2017-MercierCJ #analysis #automation #named #reverse engineering
- dynStruct: An automatic reverse engineering tool for structure recovery and memory use analysis (DM, AC, RJ), pp. 497–501.
- AFL-2017-SalehiDS #monad
- Generalized Results on Monoids as Memory (ÖS, FD, ACCS), pp. 234–247.
- SEFM-2017-GeorgetJPTT #concurrent #data flow #linux
- Information Flow Tracking for Linux Handling Concurrent System Calls and Shared Memory (LG, MJ, GP, FT, VVTT), pp. 1–16.
- SEFM-2017-TomascoN0TP #abstraction #design #modelling #using
- Using Shared Memory Abstractions to Design Eager Sequentializations for Weak Memory Models (ET, TLN, BF0, SLT, GP), pp. 185–202.
- AIIDE-2017-PowleyCW #bound #monte carlo
- Memory Bounded Monte Carlo Tree Search (EJP, PIC, DW), pp. 94–100.
- CIKM-2017-TayTH #analysis #network #sentiment
- Dyadic Memory Networks for Aspect-based Sentiment Analysis (YT, LAT, SCH), pp. 107–116.
- CIKM-2017-ZhengWWYJ #generative #modelling #sequence
- Sequence Modeling with Hierarchical Deep Generative Models with Dual Memory (YZ, LW, JW0, JY0, LJ), pp. 1369–1378.
- ICML-2017-HuQ #network
- State-Frequency Memory Recurrent Neural Networks (HH, GJQ), pp. 1568–1577.
- KDD-2017-ZangCF0 #modelling #process #social
- Long Short Memory Process: Modeling Growth Dynamics of Microscopic Social Connectivity (CZ, PC0, CF, WZ0), pp. 565–574.
- ECOOP-2017-KaiserDDLV #consistency #logic #reasoning
- Strong Logic for Weak Memory: Reasoning About Release-Acquire Consistency in Iris (JOK, HHD, DD, OL, VV), p. 29.
- OOPSLA-2017-CohenFL #performance #protocol
- Efficient logging in non-volatile memory by exploiting coherency protocols (NC, MF, JRL), p. 24.
- OOPSLA-2017-ParkinsonVVCDMB #dot-net
- Project snowflake: non-blocking safe manual memory management in .NET (MJP, DV, KV, MC, PD, DM, AB, JB), p. 25.
- OOPSLA-2017-UgawaAM #concurrent #garbage collection #model checking #modelling
- Model checking copy phases of concurrent copying garbage collection with various memory models (TU, TA0, TM), p. 26.
- PLDI-2017-BornholtT #framework #modelling #sketching #testing
- Synthesizing memory models from framework sketches and Litmus tests (JB, ET), pp. 467–481.
- PLDI-2017-KediaCPVVB #performance
- Simple, fast, and safe manual memory management (PK, MC, MJP, KV, DV, AB), pp. 233–247.
- POPL-2017-WickersonBSC #automation #consistency #modelling
- Automatically comparing memory consistency models (JW, MB, TS0, GAC), pp. 190–204.
- SAS-2017-GurfinkelN #c #c++ #source code #verification
- A Context-Sensitive Memory Model for Verification of C/C++ Programs (AG, JAN), pp. 148–168.
- SAS-2017-LeonFHM #analysis #modelling
- Portability Analysis for Weak Memory Models. PORTHOS: One Tool for all Models (HPdL, FF, KH, RM0), pp. 299–320.
- ESEC-FSE-2017-KusanoW #modelling #static analysis #thread
- Thread-modular static analysis for relaxed memory models (MK, CW0), pp. 337–348.
- SLE-2017-Pereira0RRCFS #energy #how #performance #programming language #question
- Energy efficiency across programming languages: how do energy, time, and memory relate? (RP, MC, FR, RR, JC, JPF, JS), pp. 256–267.
- ASPLOS-2017-AgarwalW #in memory #named
- Thermostat: Application-transparent Page Management for Two-tiered Main Memory (NA, TFW), pp. 631–644.
- ASPLOS-2017-GaoPYHK #3d #named #network #performance #scalability
- TETRIS: Scalable and Efficient Neural Network Acceleration with 3D Memory (MG, JP, XY, MH, CK), pp. 751–764.
- ASPLOS-2017-KanevXWB #named
- Mallacc: Accelerating Memory Allocation (SK, SLX, GYW, DMB), pp. 33–45.
- ASPLOS-2017-LiuZCQWZR #named #persistent #transaction
- DudeTM: Building Durable Transactions with Decoupling for Persistent Memory (ML, MZ, KC, XQ, YW, WZ, JR), pp. 329–343.
- ASPLOS-2017-LustigWPG #automation #synthesis #testing
- Automated Synthesis of Comprehensive Memory Model Litmus Test Suites (DL, AW, AP, OG), pp. 661–675.
- ASPLOS-2017-NalliHHSVK #analysis #persistent
- An Analysis of Persistent Memory Use with WHISPER (SN, SH, MDH, MMS, HV0, KK), pp. 135–148.
- ASPLOS-2017-NguyenP #scalability #source code #transaction #what
- What Scalable Programs Need from Transactional Memory (DN, KP), pp. 105–118.
- ASPLOS-2017-SeoKBNN #persistent
- Failure-Atomic Slotted Paging for Persistent Memory (JS, WHK, WB, BN, SHN), pp. 91–104.
- ASPLOS-2017-TrippelMLPM #hardware #named #verification
- TriCheck: Memory Model Verification at the Trisection of Software, Hardware, and ISA (CT, YAM, DL, MP, MM), pp. 119–133.
- CGO-2017-AinsworthJ
- Software prefetching for indirect memory accesses (SA, TMJ0), pp. 305–317.
- CGO-2017-QasemAR #architecture #data transformation
- Characterizing data organization effects on heterogeneous memory architectures (AQ, AMA, GR), pp. 160–170.
- CGO-2017-SenguptaCBK #bound #hardware #named #transaction #using
- Legato: end-to-end bounded region serializability using commodity hardware transactional memory (AS, MC, MDB, MK0), pp. 1–13.
- ESOP-2017-WoodDLE #composition #equivalence #verification
- Modular Verification of Procedure Equivalence in the Presence of Memory Allocation (TW0, SD, SKL, SE), pp. 937–963.
- CAV-2017-Vafeiadis #consistency #logic #using #verification
- Program Verification Under Weak Memory Consistency Using Separation Logic (VV), pp. 30–46.
- VMCAI-2017-0062BW #modelling #program analysis
- Partitioned Memory Models for Program Analysis (WW0, CWB, TW), pp. 539–558.
- FM-2016-LahavV #modelling #program transformation
- Explaining Relaxed Memory Models with Program Transformations (OL, VV), pp. 479–495.
- Haskell-2016-LeYF #haskell #transaction
- Revisiting software transactional memory in Haskell (ML, RY, MF), pp. 105–113.
- ICFP-2016-BlazyLP #c
- An abstract memory functor for verified C static analyzers (SB, VL, DP), pp. 325–337.
- ICFP-2016-RaghunathanMAB #parallel #source code
- Hierarchical memory management for parallel programs (RR, SKM, UAA, GEB), pp. 392–406.
- ECIR-2016-JurgovskyGS #performance #robust #word
- Evaluating Memory Efficiency and Robustness of Word Embeddings (JJ, MG, CS), pp. 200–211.
- ICML-2016-DanihelkaWUKG
- Associative Long Short-Term Memory (ID, GW, BU, NK, AG), pp. 1986–1994.
- ICML-2016-KumarIOIBGZPS #natural language #network
- Ask Me Anything: Dynamic Memory Networks for Natural Language Processing (AK, OI, PO, MI, JB0, IG, VZ, RP, RS), pp. 1378–1387.
- ICML-2016-LiZZ #learning
- Learning to Generate with Memory (CL, JZ0, BZ0), pp. 1177–1186.
- ICML-2016-OhCSL
- Control of Memory, Active Perception, and Action in Minecraft (JO, VC, SPS, HL), pp. 2790–2799.
- ICML-2016-XiongMS #network #visual notation
- Dynamic Memory Networks for Visual and Textual Question Answering (CX, SM, RS), pp. 2397–2406.
- KDD-2016-StefaniERU #named
- TRIÈST: Counting Local and Global Triangles in Fully-Dynamic Streams with Fixed Memory Size (LDS, AE, MR, EU), pp. 825–834.
- KDD-2016-TaghaviLK #machine learning #recommendation #using
- Compute Job Memory Recommender System Using Machine Learning (TT, ML, YK), pp. 609–616.
- ECOOP-2016-PoulsenNTV #layout #semantics
- Scopes Describe Frames: A Uniform Model for Memory Layout in Dynamic Semantics (CBP, PN, APT, EV), p. 26.
- OOPSLA-2016-BhandariCB #named #performance
- Makalu: fast recoverable allocation of non-volatile memory (KB, DRC, HJB), pp. 677–694.
- OOPSLA-2016-DanLHV #analysis #modelling #programming
- Modeling and analysis of remote memory access programming (AMD, PL0, TH, MTV), pp. 129–144.
- LOPSTR-2016-FangS #abstraction #analysis
- Hierarchical Shape Abstraction for Analysis of Free List Memory Allocators (BF0, MS), pp. 151–167.
- PLDI-2016-SorensenD #fault #gpu
- Exposing errors related to weak memory in GPU applications (TS0, AFD), pp. 100–113.
- SAS-2016-SuzanneM #abstract interpretation #array #modelling
- From Array Domains to Abstract Interpretation Under Store-Buffer-Based Memory Models (TS, AM), pp. 469–488.
- FSE-2016-JiangXLML #coordination #dependence #online #reduction
- Online shared memory dependence reduction via bisectional coordination (YJ, CX, DL, XM, JL), pp. 822–832.
- FSE-2016-MiucinBF #behaviour #profiling
- End-to-end memory behavior profiling with DINAMITE (SM, CB, AF), pp. 1042–1046.
- ICSE-2016-CuiPCFK #execution #memory dump #named
- RETracer: triaging crashes by reverse execution from partial memory dumps (WC, MP, SKC, YF, VPK), pp. 820–831.
- ASPLOS-2016-AwadMHSH #in memory #low cost
- Silent Shredder: Zero-Cost Shredding for Secure Non-Volatile Main Memory Controllers (AA, PKM, SH, YS, WH), pp. 263–276.
- ASPLOS-2016-DidonaDKGNR #abstraction #named #performance #transaction
- ProteusTM: Abstraction Meets Performance in Transactional Memory (DD, ND, AMK, RG, RN, PR0), pp. 757–771.
- ASPLOS-2016-GuoSCM #approximate #image #using
- High-Density Image Storage Using Approximate Memory Cells (QG, KS, LC, HSM), pp. 413–426.
- ASPLOS-2016-IzraelevitzKK #persistent
- Failure-Atomic Persistent Memory Updates via JUSTDO Logging (JI, TK, AK), pp. 427–442.
- ASPLOS-2016-LinL #named #programming #towards
- memif: Towards Programming Heterogeneous Memory Asynchronously (FXL, XL0), pp. 369–383.
- ASPLOS-2016-LustigSMB #interface #named #verification
- COATCheck: Verifying Memory Ordering at the Hardware-OS Interface (DL, GS, MM, AB), pp. 233–247.
- ASPLOS-2016-PrasadG
- Prudent Memory Reclamation in Procrastination-Based Synchronization (AP, KG), pp. 99–112.
- ASPLOS-2016-ZhangLJ #concurrent #detection #hardware #named #performance #transaction #using
- TxRace: Efficient Data Race Detection Using Commodity Hardware Transactional Memory (TZ, DL, CJ), pp. 159–173.
- CC-2016-CaoV #concurrent #thread
- Reducing memory buffering overhead in software thread-level speculation (ZC, CV), pp. 12–22.
- CC-2016-DarteIY
- Extended lattice-based memory allocation (AD, AI, TY), pp. 218–228.
- FASE-2016-BolignanoJS #abstraction #modelling
- Modeling and Abstraction of Memory Management in a Hypervisor (PB, TJ, VS), pp. 214–230.
- VMCAI-2016-DokoV #logic
- A Program Logic for C11 Memory Fences (MD, VV), pp. 413–430.
- PODS-2015-HuQT
- External Memory Stream Sampling (XH, MQ, YT), pp. 229–239.
- SIGMOD-2015-ArulrajPD #database
- Let’s Talk About Storage & Recovery Methods for Non-Volatile Memory Database Systems (JA, AP, SD), pp. 707–722.
- SIGMOD-2015-ElmoreATPAA #configuration management #database #fine-grained #in memory #named
- Squall: Fine-Grained Live Reconfiguration for Partitioned Main Memory Databases (AJE, VA, RT, AP, DA, AEA), pp. 299–313.
- SIGMOD-2015-FengLKX #in memory #layout #named
- ByteSlice: Pushing the Envelop of Main Memory Data Processing with a New Storage Layout (ZF, EL, BK, WX), pp. 31–46.
- SIGMOD-2015-Viglas #data transformation
- Data Management in Non-Volatile Memory (SDV), pp. 1707–1711.
- VLDB-2015-ChenJ #in memory #persistent
- Persistent B+-Trees in Non-Volatile Main Memory (SC, QJ), pp. 786–797.
- VLDB-2015-JhaHLCH #approach #in memory
- Improving Main Memory Hash Joins on Intel Xeon Phi Processors: An Experimental Approach (SJ, BH, ML, XC, HPH), pp. 642–653.
- VLDB-2015-MakreshanskiLS #hardware #transaction
- To Lock, Swap, or Elide: On the Interplay of Hardware Transactional Memory and Lock-Free Indexing (DM, JJL, RS), pp. 1298–1309.
- VLDB-2015-NarasayyaMSLSC #as a service #multitenancy #relational
- Sharing Buffer Pool Memory in Multi-Tenant Relational Database-as-a-Service (VRN, IM, MS, FL, MS, SC), pp. 726–737.
- VLDB-2015-OhKLM #mobile #optimisation
- SQLite Optimization with Phase Change Memory for Mobile Applications (GO, SK, SWL, BM), pp. 1454–1465.
- EDM-2015-Pelanek15a #adaptation #education #modelling #student
- Modeling Students' Memory for Application in Adaptive Educational Systems (RP), pp. 480–483.
- SANER-2015-SinghGN #data type #graph
- MG++: Memory graphs for analyzing dynamic data structures (VS, RG, IN), pp. 291–300.
- SCAM-2015-GhanavatiA #automation #testing
- Automated memory leak diagnosis by regression testing (MG, AA), pp. 191–200.
- ICALP-v2-2015-FijalkowHKS #bound #game studies
- Trading Bounds for Memory in Games with Counters (NF, FH, DK, MS), pp. 197–208.
- ICALP-v2-2015-LahavV #modelling #reasoning
- Owicki-Gries Reasoning for Weak Memory Models (OL, VV), pp. 311–323.
- LATA-2015-Cotton-BarrattMO #automaton
- Weak and Nested Class Memory Automata (CCB, ASM, CHLO), pp. 188–199.
- FM-2015-DerrickS #correctness #framework #modelling
- A Framework for Correctness Criteria on Weak Memory Models (JD, GS), pp. 178–194.
- SEFM-2015-RochaBC #bound #c #generative #model checking #source code #testing #using
- Memory Management Test-Case Generation of C Programs Using Bounded Model Checking (HR, RSB, LCC), pp. 251–267.
- CHI-2015-GennipHM #design #interactive
- Things That Make Us Reminisce: Everyday Memory Cues as Opportunities for Interaction Design (DvG, EvdH, PM), pp. 3443–3452.
- CHI-2015-HarozKF #performance #visualisation
- ISOTYPE Visualization: Working Memory, Performance, and Engagement with Pictographs (SH, RK, SLF), pp. 1191–1200.
- CHI-2015-PerraultLBZG #physics #semantics
- Physical Loci: Leveraging Spatial, Object and Semantic Memory for Command Selection (STP, EL, YPB, SZ, YG), pp. 299–308.
- CHI-2015-RaganGT #how #process #visual notation
- Evaluating How Level of Detail of Visual History Affects Process Memory (EDR, JRG, AT), pp. 2711–2720.
- CAiSE-2015-HarmanBJRK #elicitation #process
- Virtual Business Role-Play: Leveraging Familiar Environments to Prime Stakeholder Memory During Process Elicitation (JH, RB, DJ, SRM, UK), pp. 166–180.
- ICEIS-v1-2015-SilvaHL #approach #hybrid
- A Hybrid Memory Data Cube Approach for High Dimension Relations (RRS, CMH, JdCL), pp. 139–149.
- ICML-2015-GongY #analysis #convergence
- A Modified Orthant-Wise Limited Memory Quasi-Newton Method with Convergence Analysis (PG, JY), pp. 276–284.
- ICML-2015-ZhuSG #recursion
- Long Short-Term Memory Over Recursive Structures (XDZ, PS, HG), pp. 1604–1612.
- SEKE-2015-AdornesGLF #architecture #distributed #domain-specific language #pipes and filters
- A Unified MapReduce Domain-Specific Language for Distributed and Shared Memory Architectures (DA, DG, CL, LGF), pp. 619–624.
- OOPSLA-2015-0003KLS #data type #multi #performance #scalability
- Fast, multicore-scalable, low-fragmentation memory allocation through large virtual memory and global data structures (MA, CMK, ML, AS), pp. 451–469.
- OOPSLA-2015-CohenP #automation #data type
- Automatic memory reclamation for lock-free data structures (NC, EP), pp. 260–279.
- OOPSLA-2015-JantzRKD
- Cross-layer memory management for managed language applications (MRJ, FJR, PAK, KAD), pp. 488–504.
- OOPSLA-2015-OuD #automation #named #order #parametricity
- AutoMO: automatic inference of memory order parameters for C/C++11 (PO, BD), pp. 221–240.
- LOPSTR-2015-RiescoAA #analysis #maude #policy #semantics #specification
- Memory Policy Analysis for Semantics Specifications in Maude (AR0, IMA, MA), pp. 293–310.
- PLDI-2015-KangHMGZV #c
- A formal C memory model supporting integer-pointer casts (JK, CKH, WM, DG, SZ, VV), pp. 326–335.
- PLDI-2015-TassarottiDV #logic #verification
- Verifying read-copy-update in a logic for weak memory (JT, DD, VV), pp. 110–120.
- PLDI-2015-ZhangKW #modelling #partial order #reduction
- Dynamic partial order reduction for relaxed memory models (NZ, MK, CW), pp. 250–259.
- POPL-2015-CraryS #calculus
- A Calculus for Relaxed Memory (KC, MJS), pp. 623–636.
- POPL-2015-VafeiadisBCMN #compilation #optimisation #what
- Common Compiler Optimisations are Invalid in the C11 Memory Model and what we can do about it (VV, TB, SC, RM, FZN), pp. 209–220.
- ASE-2015-JiangLXML #dependence
- Optimistic Shared Memory Dependence Tracing (T) (YJ, DL, CX, XM, JL), pp. 524–534.
- ESEC-FSE-2015-FuLB #analysis #automation #memory dump #pointer
- Automatically deriving pointer reference expressions from binary code for memory dump analysis (YF, ZL, DB), pp. 614–624.
- ESEC-FSE-2015-JensenSSC #debugging #independence #javascript #named #platform
- MemInsight: platform-independent memory debugging for JavaScript (SHJ, MS, KS, SC), pp. 345–356.
- SAC-2015-BusseSDNH #data access #virtual machine
- Partial coscheduling of virtual machines based on memory access patterns (AB, JHS, MD, POAN, HUH), pp. 2033–2038.
- SAC-2015-DuarteBPC #composition #transaction
- Composable memory transactions with eager version management (RMD, ARDB, MLP, GGHC), pp. 2093–2098.
- SAC-2015-FerreiraMME #analysis #comparison #kernel
- An experimental comparison analysis of kernel-level memory allocators (TBF, RM, AM, BEC), pp. 2054–2059.
- SAC-2015-JakobssonKS #c #hybrid #monitoring #performance
- Fast as a shadow, expressive as a tree: hybrid memory monitoring for C (AJ, NK, JS), pp. 1765–1772.
- SAC-2015-LeeKKE #algorithm #architecture #hybrid #named
- M-CLOCK: migration-optimized page replacement algorithm for hybrid DRAM and PCM memory architecture (ML, DK, JK, YIE), pp. 2001–2006.
- SAC-2015-LeeRH #file system #performance
- Performance implications of cache flushes for non-volatile memory file systems (KL, SR, HH), pp. 2069–2071.
- SAC-2015-Oikawa #adaptation
- Exposing non-volatile memory cache for adaptive storage access (SO), pp. 2021–2026.
- ASPLOS-2015-AgarwalNSOK
- Page Placement Strategies for GPUs within Heterogeneous Memory Systems (NA, DWN, MS, MO, SWK), pp. 607–618.
- ASPLOS-2015-ColpZGSLRSW #smarttech
- Protecting Data on Smartphones and Tablets from Memory Attacks (PC, JZ, JG, SS, EdL, HR, SS, AW), pp. 177–189.
- ASPLOS-2015-DuanHT #optimisation #performance #symmetry
- Asymmetric Memory Fences: Optimizing Both Performance and Implementability (YD, NH, JT), pp. 531–543.
- ASPLOS-2015-LiuHMHTS #named
- GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation (CL, AH, MM, MWH, MT, ES), pp. 87–101.
- ASPLOS-2015-MatveevS #hardware #hybrid #scalability #transaction
- Reduced Hardware NOrec: A Safe and Scalable Hybrid Transactional Memory (AM, NS), pp. 59–71.
- ASPLOS-2015-SridharanDBFSSG #fault
- Memory Errors in Modern Systems: The Good, The Bad, and The Ugly (VS, ND, SB, KBF, JS, JS, SG), pp. 297–310.
- ASPLOS-2015-WangJZY #named #reliability
- SD-PCM: Constructing Reliable Super Dense Phase Change Memory under Write Disturbance (RW, LJ, YZ, JY), pp. 19–31.
- ASPLOS-2015-ZhangYMS #named #reliability
- Mojim: A Reliable and Highly-Available Non-Volatile Memory System (YZ, JY, AM, SS), pp. 3–18.
- CGO-2015-FauziaPS
- Characterizing and enhancing global memory data coalescing on GPUs (NF, LNP, PS), pp. 12–22.
- CGO-2015-LiYLZ #automation #gpu
- Automatic data placement into GPU on-chip memory resources (CL, YY, ZL, HZ), pp. 23–33.
- CGO-2015-StepanovS #c++ #detection #named #performance
- MemorySanitizer: fast detector of uninitialized memory use in C++ (ES, KS), pp. 46–55.
- DAC-2015-ChangCKLL #performance
- Achieving SLC performance with MLC flash memory (YMC, YHC, TWK, YCL, HPL), p. 6.
- DAC-2015-ChungRPG #energy
- Domain wall memory based digital signal processors for area and energy-efficiency (JC, KR, JP, SG), p. 6.
- DAC-2015-GuSZCH #embedded #performance
- Area and performance co-optimization for domain wall memory in application-specific embedded systems (SG, EHMS, QZ, YC, JH), p. 6.
- DAC-2015-KlineXMJ #energy
- Domain-wall memory buffer for low-energy NoCs (DKJ, HX, RGM, AKJ), p. 6.
- DAC-2015-MengYOLW #array #clustering #data access #parallel #performance
- Efficient memory partitioning for parallel data access in multidimensional arrays (CM, SY, PO, LL, SW), p. 6.
- DAC-2015-RahimiCMGB #clustering #embedded #hardware #scheduling #variability
- Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters (AR, DC, AM, RKG, LB), p. 6.
- DAC-2015-SeyedzadehMJM #encoding #named #pseudo #reduction
- PRES: pseudo-random encoding scheme to increase the bit flip reduction in the memory (SMS, RM, AKJ, RGM), p. 6.
- DAC-2015-TsaiYPLTCC #design #energy #in memory #using
- Energy-efficient non-volatile TCAM search engine design using priority-decision in memory technology for DPI (HJT, KHY, YCP, CCL, YHT, MFC, TFC), p. 6.
- DAC-2015-WangH0LL #logic #named
- ProPRAM: exploiting the transparent logic resources in non-volatile memory for near data computing (YW, YH, LZ, HL, XL), p. 6.
- DAC-2015-WangHWLL #assembly #named
- RADAR: a case for retention-aware DRAM assembly and repair in future FGR DRAM memory (YW, YH, CW, HL, XL), p. 6.
- DAC-2015-WangJZWY15a
- Exploit imbalanced cell writes to mitigate write disturbance in dense phase change memory (RW, LJ, YZ, LW, JY), p. 6.
- DAC-2015-YoonSMC #behaviour #detection #embedded #heatmap #realtime #using
- Memory heat map: anomaly detection in real-time embedded systems using memory behavior (MKY, LS, SM, JC), p. 6.
- DATE-2015-AntoniadisKEBS #architecture #on the #optimisation #statistics
- On the statistical memory architecture exploration and optimization (CA, GK, NEE, APB, GIS), pp. 543–548.
- DATE-2015-ArumugamSAPUBPY #algorithm #co-evolution #design #energy #novel #performance
- Novel inexact memory aware algorithm co-design for energy efficient computation: algorithmic principles (GPA, PS, JA, KVP, EU, AB, P, SY), pp. 752–757.
- DATE-2015-AzarkhishRLB #performance
- High performance AXI-4.0 based interconnect for extensible smart memory cubes (EA, DR, IL, LB), pp. 1317–1322.
- DATE-2015-CilardoG #clustering #multi
- Interplay of loop unrolling and multidimensional memory partitioning in HLS (AC, LG), pp. 163–168.
- DATE-2015-FuLX #energy
- Race to idle or not: balancing the memory sleep time with DVS for energy minimization (CF, ML, CJX), pp. 13–18.
- DATE-2015-FuZLX #manycore
- Maximizing common idle time on multi-core processors with shared memory (CF, YZ, ML, CJX), pp. 900–903.
- DATE-2015-GomonyGAAG #realtime #scalability
- A generic, scalable and globally arbitrated memory tree for shared DRAM access in real-time systems (MDG, JG, BA, NCA, KGWG), pp. 193–198.
- DATE-2015-KimKK #programming
- Subpage programming for extending the lifetime of NAND flash memory (JHK, SHK, JSK), pp. 555–560.
- DATE-2015-Lastras-Montano #configuration management #hybrid #named
- HReRAM: a hybrid reconfigurable resistive random-access memory (MALM, AG, KTC), pp. 1299–1304.
- DATE-2015-LinH #named
- HLC: software-based half-level-cell flash memory (HYL, JWH), pp. 936–941.
- DATE-2015-LiSGWXZS #performance #reduction
- Maximizing IO performance via conflict reduction for flash memory storage systems (QL, LS, CG, KW, CJX, QZ, EHMS), pp. 904–907.
- DATE-2015-MazloumiM #hybrid #multi
- A hybrid packet/circuit-switched router to accelerate memory access in NoC-based chip multiprocessors (AM, MM), pp. 908–911.
- DATE-2015-ParkAHYL #big data #energy #gpu #low cost #performance
- Memory fast-forward: a low cost special function unit to enhance energy efficiency in GPU for big data processing (EP, JA, SH, SY, SL), pp. 1341–1346.
- DATE-2015-RahimiGCBG #approximate #energy
- Approximate associative memristive memory for energy-efficient GPUs (AR, AG, KTC, LB, RKG), pp. 1497–1502.
- DATE-2015-RanjanRVPRR #configuration management #named #using
- DyReCTape: a dynamically reconfigurable cache using domain wall memory tapes (AR, SGR, RV, VSP, KR, AR), pp. 181–186.
- DATE-2015-RawatS #architecture #concurrent #hybrid #manycore #thread
- Enabling multi-threaded applications on hybrid shared memory manycore architectures (TR, AS), pp. 742–747.
- DATE-2015-ReehmanCCS #approach #architecture #hardware #parallel
- In-place memory mapping approach for optimized parallel hardware interleaver architectures (SUR, CC, PC, AS), pp. 896–899.
- DATE-2015-SunZLZZGSKRLZY #design
- From device to system: cross-layer design exploration of racetrack memory (GS, CZ, HL, YZ, WZ, YG, YS, JOK, DR, YL, WZ, HY), pp. 1018–1023.
- DATE-2015-TanLF #reliability #using
- Soft-error reliability and power co-optimization for GPGPUS register file using resistive memory (JT, ZL, XF), pp. 369–374.
- DATE-2015-WeiDC #architecture #multi #scalability
- A scalable and high-density FPGA architecture with multi-level phase change memory (CW, AD, DC), pp. 1365–1370.
- HPCA-2015-CaiLHMM #optimisation
- Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (YC, YL, EFH, KM, OM), pp. 551–563.
- HPCA-2015-DuZCMM #physics
- Supporting superpages in non-contiguous physical memory (YD, MZ, BRC, DM, RGM), pp. 223–234.
- HPCA-2015-FarahaniAMK #architecture #named #standard
- NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules (AFF, JHA, KM, NSK), pp. 283–295.
- HPCA-2015-KimSE #flexibility #reliability
- Bamboo ECC: Strong, safe, and flexible codes for reliable computer memory (JK, MS, ME), pp. 101–112.
- HPCA-2015-MeswaniBRSIL #approach #architecture
- Heterogeneous memory architectures: A HW/SW approach for mixing die-stacked and off-package memories (MRM, SB, DR, JS, MI, GHL), pp. 126–136.
- HPCA-2015-NairCRQ #latency
- Reducing read latency of phase change memory via early read and Turbo Read (PJN, CCC, BR, MKQ), pp. 309–319.
- HPCA-2015-SethiaJM #gpu #named
- Mascar: Speeding up GPU warps by reducing memory pitstops (AS, DAJ, SAM), pp. 174–185.
- HPCA-2015-WangPBAK #alloy #architecture #named
- Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems (HW, CJP, GB, JHA, NSK), pp. 296–308.
- HPCA-2015-XuNMBZY0 #architecture #challenge
- Overcoming the challenges of crossbar resistive memory architectures (CX, DN, NM, RB, TZ, SY, YX), pp. 476–488.
- HPDC-2015-BestaH #hardware #transaction
- Accelerating Irregular Computations with Hardware Transactional Memory and Active Messages (MB, TH), pp. 161–172.
- HPDC-2015-KaxirasKNRS #approach #distributed #execution #scalability
- Turning Centralized Coherence and Distributed Critical-Section Execution on their Head: A New Approach for Scalable Distributed Shared Memory (SK, DK, MN, AR, KFS), pp. 3–14.
- HPDC-2015-KocoloskiL #multi #named #performance
- XEMEM: Efficient Shared Memory for Composed Applications on Multi-OS/R Exascale Systems (BK, JRL), pp. 89–100.
- ISMM-2015-HusseinHPV #garbage collection
- Don’t race the memory bus: taming the GC leadfoot (AH, ALH, MP, CAV), pp. 15–27.
- ISMM-2015-KimKKJ #mobile #physics
- Controlling physical memory fragmentation in mobile systems (SHK, SK, JSK, JJ), pp. 1–14.
- ISMM-2015-StancuWBLF #hybrid #java #performance
- Safe and efficient hybrid memory management for Java (CS, CW, SB, PL, MF), pp. 81–92.
- LCTES-2015-LiuY #encryption #framework #in memory
- Secure and Durable (SEDURA): An Integrated Encryption and Wear-leveling Framework for PCM-based Main Memory (CL, CY), p. 10.
- PDP-2015-KonstantinidisC #bound #gpu #kernel #performance
- A Practical Performance Model for Compute and Memory Bound GPU Kernels (EK, YC), pp. 651–658.
- PDP-2015-NakanoI #algorithm #gpu #implementation #parallel
- Optimality of Fundamental Parallel Algorithms on the Hierarchical Memory Machine, with GPU Implementation (KN, YI), pp. 626–634.
- PDP-2015-NanriSAMHKTS #communication #interface #performance
- Channel Interface: A Primitive Model for Memory Efficient Communication (TN, TS, YA, YM, HH, TK, TT, SS), pp. 177–181.
- PDP-2015-RobertsenWM #data transfer #multi #simulation #strict
- Lattice Boltzmann Simulations at Petascale on Multi-GPU Systems with Asynchronous Data Transfer and Strictly Enforced Memory Read Alignment (FR, JW, KM), pp. 604–609.
- PPoPP-2015-BaldassinBA #performance #transaction
- Performance implications of dynamic memory allocators on transactional memory systems (AB, EB, GA), pp. 87–96.
- PPoPP-2015-RavishankarDEPRRS #code generation #distributed
- Distributed memory code generation for mixed Irregular/Regular computations (MR, RD, VE, LNP, JR, AR, PS), pp. 65–75.
- PPoPP-2015-ZhangHCB #semantics #transaction
- Low-overhead software transactional memory with progress guarantees and strong semantics (MZ, JH, MC, MDB), pp. 97–108.
- SOSP-2015-FangNXDL #scalability #source code
- Interruptible tasks: treating memory pressure as interrupts for highly scalable data-parallel programs (LF, KN, G(X, BD, SL), pp. 394–409.
- FoSSaCS-2015-Cotton-BarrattH #automaton #decidability #ml
- Fragments of ML Decidable by Nested Data Class Memory Automata (CCB, DH, ASM, CHLO), pp. 249–263.
- FoSSaCS-2015-GenestPS
- Knowledge = Observation + Memory + Computation (BG, DP, SS), pp. 215–229.
- STOC-2015-KoppulaLW #bound #obfuscation #turing machine
- Indistinguishability Obfuscation for Turing Machines with Unbounded Memory (VK, ABL, BW), pp. 419–428.
- TACAS-2015-NutzDMP #contest #safety
- ULTIMATE KOJAK with Memory Safety Checks — (Competition Contribution) (AN, DD, MMM, AP), pp. 458–460.
- TACAS-2015-StroderAFHG #c #contest #named #safety #source code #termination
- AProVE: Termination and Memory Safety of C Programs — (Competition Contribution) (TS, CA, FF, JH, JG), pp. 417–419.
- TACAS-2015-TomascoI0TP #contest
- MU-CSeq 0.3: Sequentialization by Read-Implicit and Coarse-Grained Memory Unwindings — (Competition Contribution) (ET, OI, BF, SLT, GP), pp. 436–438.
- TACAS-2015-TomascoI0TP15a #concurrent #source code #verification
- Verifying Concurrent Programs by Memory Unwinding (ET, OI, BF, SLT, GP), pp. 551–565.
- CAV-2015-ManskyGZ #axiom #modelling #specification
- An Axiomatic Specification for Sequential Memory Models (WM, DG, SZ), pp. 413–428.
- VMCAI-2015-ChristakisG #composition #image #parsing #proving #safety #testing #using
- Proving Memory Safety of the ANI Windows Image Parser Using Compositional Exhaustive Testing (MC, PG), pp. 373–392.
- VMCAI-2015-DanMVY #abstraction #effectiveness #modelling #verification
- Effective Abstractions for Verification under Relaxed Memory Models (AMD, YM, MTV, EY), pp. 449–466.
- CBSE-2014-Attouchi0BM #execution #monitoring #multitenancy
- Memory monitoring in a multi-tenant OSGi execution environment (KA, GT, AB, GM), pp. 107–116.
- CBSE-2014-KurodaYKKM
- A memory isolation method for OSGi-based home gateways (YK, IY, SK, YK, OM), pp. 117–122.
- QoSA-2014-GooijerH #case study #experience #industrial #manycore #modelling #realtime
- Experiences with modeling memory contention for multi-core industrial real-time systems (TdG, KEH), pp. 43–52.
- HT-2014-ChengKWT #architecture #distributed #performance #rdf #scalability
- A two-tier index architecture for fast processing large RDF data over distributed memory (LC, SK, TEW, GT), pp. 300–302.
- JCDL-2014-KanhabuaNN #analysis #scalability #what #wiki
- What triggers human remembering of events? A large-scale analysis of catalysts for collective memory in Wikipedia (NK, TNN, CN), pp. 341–350.
- SIGMOD-2014-ElmeleegyOR #distributed #named #pipes and filters #using
- SpongeFiles: mitigating data skew in mapreduce using distributed memory (KE, CO, BR), pp. 551–562.
- SIGMOD-2014-Herlihy #hardware #transaction
- Fun with hardware transactional memory (MH), p. 575.
- SIGMOD-2014-KangLMKO #database #relational
- Durable write cache in flash memory SSD for relational and NoSQL databases (WHK, SWL, BM, YSK, MO), pp. 529–540.
- VLDB-2014-Viglas #persistent
- Write-limited sorts and joins for persistent memory (SV), pp. 413–424.
- VLDB-2014-WangJ #scalability
- Scalable Logging through Emerging Non-Volatile Memory (TW, RJ), pp. 865–876.
- VLDB-2015-SidlauskasJ14 #exclamation #implementation #in memory #matter
- Spatial Joins in Main Memory: Implementation Matters! (DS, CSJ), pp. 97–100.
- ICALP-v1-2014-MertziosNRS #interactive #network
- Determining Majority in Networks with Local Interactions and Very Small Local Memory (GBM, SEN, CR, PGS), pp. 871–882.
- FM-2014-MaricS #hardware #transaction #verification
- Verification of a Transactional Memory Manager under Hardware Failures and Restarts (OM, CS), pp. 449–464.
- DHM-2014-MirandaRV #analysis #development #mobile #testing
- Analysis of Luria Memory Tests for Development on Mobile Devices (JAHM, EHR, AMV), pp. 546–557.
- DUXU-ELAS-2014-MedeirosJG #learning #named #student
- Logograms: Memory Aids for Learning, and an Example with Hearing-Impaired Students (LM, MBJ, LVG), pp. 207–216.
- HCI-AIMT-2014-SunLF #comprehension
- The Effects of Working Memory Load and Mental Imagery on Metaphoric Meaning Access in Metaphor Comprehension (XS, YL, XF), pp. 502–510.
- ICML-c1-2014-SiHD #approximate #kernel #performance
- Memory Efficient Kernel Approximation (SS, CJH, ISD), pp. 701–709.
- ICML-c2-2014-AnarakiH #performance #random
- Memory and Computation Efficient PCA via Very Sparse Random Projections (FPA, SMH), pp. 1341–1349.
- ICML-c2-2014-JunB #monte carlo #performance
- Memory (and Time) Efficient Sequential Monte Carlo (SHJ, ABC), pp. 514–522.
- ICPR-2014-TabuchiTDIMKK #estimation #multi #people
- Spatial People Density Estimation from Multiple Viewpoints by Memory Based Regression (YT, TT, DD, II, HM, TK, KK), pp. 2209–2214.
- KMIS-2014-PascalT #clustering #experience #framework #information management #platform
- Transactive Memory System in Clusters — The Knowledge Management Platform Experience (AP, CT), pp. 5–14.
- KMIS-2014-Wagner #concept
- The Concept of Team Transactive Memory Systems — Developing an Extended Model for Organizational Contexts (VW), pp. 319–325.
- MLDM-2014-OtteLK #network #pattern matching #pattern recognition #problem #recognition
- Investigating Long Short-Term Memory Networks for Various Pattern Recognition Problems (SO, ML, DK), pp. 484–497.
- OOPSLA-2014-ChakrabartiBB #consistency #named
- Atlas: leveraging locks for non-volatile memory consistency (DRC, HJB, KB), pp. 433–452.
- OOPSLA-2014-HolkNSL #data type #gpu #programming language
- Region-based memory management for GPU programming languages: enabling rich data structures on a spartan host (EH, RN, JGS, AL), pp. 141–155.
- OOPSLA-2014-NazareMSBGP #analysis #validation
- Validation of memory accesses through symbolic analyses (HN, IM, WS, LB, LG, FMQP), pp. 791–809.
- OOPSLA-2014-TuronVD #named #navigation #protocol
- GPS: navigating weak memory with ghosts, protocols, and separation (AT, VV, DD), pp. 691–707.
- PLDI-2014-AlglaveMT #modelling #simulation #testing
- Herding cats: modelling, simulation, testing, and data-mining for weak memory (JA, LM, MT), p. 7.
- PLDI-2014-TavarageriKS #detection #fault
- Compiler-assisted detection of transient memory errors (ST, SK, PS), p. 24.
- SAS-2014-MeshmanDVY #refinement #synthesis
- Synthesis of Memory Fences via Refinement Propagation (YM, AMD, MTV, EY), pp. 237–252.
- SAS-2014-ToubhansCR #abstract domain #abstraction #combinator
- An Abstract Domain Combinator for Separately Conjoining Memory Abstractions (AT, BYEC, XR), pp. 285–301.
- ASE-2014-RomanoE #library #named #runtime
- symMMU: symbolically executed runtime libraries for symbolic memory access (AR, DRE), pp. 247–258.
- ASE-2014-WangWWYSYLFG #concurrent #debugging #locality #using
- Localization of concurrency bugs using shared memory access pairs (WW, ZW, CW, PCY, XS, XY, JL, XF, YG), pp. 611–622.
- ICSE-2014-JungLRP #automation #detection
- Automated memory leak detection for production use (CJ, SL, ER, SP), pp. 825–836.
- ICSE-2014-LeeJP #behaviour #detection #machine learning #modelling #using
- Detecting memory leaks through introspective dynamic behavior modelling using machine learning (SL, CJ, SP), pp. 814–824.
- SAC-2014-BaeCPJKC #clustering #effectiveness
- An effective data clustering method based on expected update time in flash memory environment (DHB, JWC, SMP, BSJ, SWK, SjC), pp. 1492–1497.
- SAC-2014-EliasMFB #algorithm #analysis
- Experimental and theoretical analyses of memory allocation algorithms (DE, RM, MF, LBdA), pp. 1545–1546.
- SAC-2014-LeeJB #design #file system #named #similarity
- DTFS: exploiting the similarity of data versions to design a write-efficient file system in phase-change memory (EL, JEJ, HB), pp. 1535–1540.
- SAC-2014-ParkKC #framework #kernel #online #platform #using
- Cooperative kernel: online memory test platform using inter-kernel context switch and memory isolation (HP, DK, JC), pp. 1517–1522.
- SAC-2014-YooLB #policy
- The least-dirty-first cache replacement policy for phase-change memory (SY, EL, HB), pp. 1449–1454.
- GPCE-2014-SteindorferV #performance
- Code specialization for memory efficient hash tries (MJS, JJV), pp. 11–14.
- ASPLOS-2014-AmitTS #named
- VSwapper: a memory swapper for virtualized environments (NA, DT, AS), pp. 349–366.
- ASPLOS-2014-ArulrajJL #hardware
- Leveraging the short-term memory of hardware to diagnose production-run software failures (JA, GJ, SL), pp. 207–222.
- ASPLOS-2014-HowerHBGHRW #modelling
- Heterogeneous-race-free memory models (DRH, BAH, BMB, BRG, MDH, SKR, DAW), pp. 427–440.
- ASPLOS-2014-LitzCFAS #named #transaction
- SI-TM: reducing transactional memory abort rates through snapshot isolation (HL, DRC, AF, OA, JPS), pp. 383–398.
- ASPLOS-2014-LiuSYYW #architecture #persistent
- NVM duet: unified working memory and persistent store architecture (RSL, DYS, CLY, SCY, CYMW), pp. 455–470.
- ASPLOS-2014-PichaiHB #architecture #cpu #design
- Architectural support for address translation on GPUs: designing memory management units for CPU/GPUs with unified address spaces (BP, LH, AB), pp. 743–758.
- CASE-2014-WuCT #analysis #modelling #multi
- Multistage semiconductor memory inventory model based on survival analysis (JZW, CFC, YCT), pp. 613–618.
- CGO-2014-XuWGLGQ #architecture #gpu #transaction
- Software Transactional Memory for GPU Architectures (YX, RW, NG, TL, LG, DQ), p. 1.
- CGO-2014-YanXYR #detection #named
- LeakChecker: Practical Static Memory Leak Detection for Managed Languages (DY, G(X, SY, AR), p. 87.
- DAC-2014-AdirGHHHHKKLMNPSOTTZ #transaction #verification
- Verification of Transactional Memory in POWER8 (AA, DG, DH, OH, BGH, KH, WK, AK, JML, CM, AN, RRP, MS, BSO, BWT, ET, AZ), p. 6.
- DAC-2014-AhnYC #hybrid #power management
- Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes (JA, SY, KC), p. 6.
- DAC-2014-DuttGNBGS #multi
- Multi-Layer Memory Resiliency (ND, PG, AN, AB, MG, MS), p. 6.
- DAC-2014-IyengarG #analysis #embedded #modelling #power management #robust
- Modeling and Analysis of Domain Wall Dynamics for Robust and Low-Power Embedded Memory (AI, SG), p. 6.
- DAC-2014-KannanKS #in memory
- Secure Memristor-based Main Memory (SK, NK, OS), p. 6.
- DAC-2014-MaoWZCL #architecture #using
- Exploration of GPGPU Register File Architecture Using Domain-wall-shift-write based Racetrack Memory (MM, WW, YZ, YC, HHL), p. 6.
- DAC-2014-ShiWZXS #reduction
- Retention Trimming for Wear Reduction of Flash Memory Storage Systems (LS, KW, MZ, CJX, EHMS), p. 6.
- DAC-2014-WenZMC #design #strict
- State-Restrict MLC STT-RAM Designs for High-Reliable High-Performance Memory System (WW, YZ, MM, YC), p. 6.
- DATE-2014-BortolottiBWRB #architecture #hybrid #manycore #power management #scalability
- Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors (DB, AB, CW, DR, LB), pp. 1–6.
- DATE-2014-BurgioTCMB #clustering #embedded #hardware #parallel
- Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters (PB, GT, FC, AM, LB), pp. 1–6.
- DATE-2014-CastellanaTF #adaptation #configuration management #hybrid #interface
- An adaptive Memory Interface Controller for improving bandwidth utilization of hybrid and reconfigurable systems (VGC, AT, FF), pp. 1–4.
- DATE-2014-DongZ #manycore #realtime #stack
- Minimizing stack memory for hard real-time applications on multicore platforms (CD, HZ), pp. 1–6.
- DATE-2014-FarbehM #architecture #fault tolerance #low cost #named
- PSP-Cache: A low-cost fault-tolerant cache memory architecture (HF, SGM), pp. 1–4.
- DATE-2014-GanapathyCACGR #analysis #framework #named #robust
- INFORMER: An integrated framework for early-stage memory robustness analysis (SG, RC, DA, EC, AG, AR), pp. 1–4.
- DATE-2014-GemmekeSSRCA
- Resolving the memory bottleneck for single supply near-threshold computing (TG, MMS, JS, PR, FC, DA), pp. 1–6.
- DATE-2014-HoffmanRAA #analysis #fault
- Wear-out analysis of Error Correction Techniques in Phase-Change Memory (CH, LR, RA, GA), pp. 1–4.
- DATE-2014-KahngK #logic #scheduling
- Co-optimization of memory BIST grouping, test scheduling, and logic placement (ABK, IK), pp. 1–6.
- DATE-2014-LamWCHHPZ #garbage collection #multi
- Garbage collection for multi-version index on flash memory (KyL, JW, YHC, JWH, PCH, CKP, CJZ), pp. 1–4.
- DATE-2014-LiHCXJX #embedded #stack
- A wear-leveling-aware dynamic stack for PCM memory in embedded systems (QL, YH, YC, CJX, NJ, CX), pp. 1–4.
- DATE-2014-LiM
- Write-once-memory-code phase change memory (JL, KM), pp. 1–6.
- DATE-2014-LiSH0 #in memory #named
- Partial-SET: Write speedup of PCM main memory (BL, SS, YH, XL), pp. 1–4.
- DATE-2014-LuCC #correlation #performance
- Achieving efficient packet-based memory system by exploiting correlation of memory requests (TL, LC, MC), pp. 1–6.
- DATE-2014-ParkYLL #graph #representation
- Accelerating graph computation with racetrack memory and pointer-assisted graph representation (EP, SY, SL, HL), pp. 1–4.
- DATE-2014-PaulKBP #energy #hardware
- Energy-efficient hardware acceleration through computing in the memory (SP, RK, SB, RP), pp. 1–6.
- DATE-2014-SampaioSZBH #architecture #distributed #energy #named #performance #video
- dSVM: Energy-efficient distributed Scratchpad Video Memory Architecture for the next-generation High Efficiency Video Coding (FS, MS, BZ, SB, JH), pp. 1–6.
- DATE-2014-TsaiCCC #3d #configuration management #multi
- Scenario-aware data placement and memory area allocation for Multi-Processor System-on-Chips with reconfigurable 3D-stacked SRAMs (MLT, YJC, YTC, RHC), pp. 1–6.
- DATE-2014-WuWDHYY #in memory #integration #manycore
- A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os (SSW, KW, SMPD, TYH, MY, HY), pp. 1–4.
- HPCA-2014-AwadS #behaviour #named
- STM: Cloning the spatial and temporal memory access behavior (AA, YS), pp. 237–247.
- HPCA-2014-ElwellRAP #architecture
- A Non-Inclusive Memory Permissions architecture for protection against cross-layer attacks (JE, RR, NBAG, DP), pp. 201–212.
- HPCA-2014-JiaSM #named #parallel
- MRPB: Memory request prioritization for massively parallel processors (WJ, KAS, MM), pp. 272–283.
- HPCA-2014-KimLJK #architecture #gpu #named #using
- GPUdmm: A high-performance and memory-oblivious GPU architecture using dynamic memory management (YK, JL, JEJ, JK), pp. 546–557.
- HPCA-2014-LiuXGZC #concurrent #consistency #hardware #transaction #virtual machine
- Concurrent and consistent virtual machine introspection with hardware transactional memory (YL, YX, HG, BZ, HC), pp. 416–427.
- HPCA-2014-ShafieeTBD #named
- MemZip: Exploring unconventional benefits from memory compression (AS, MT, RB, AD), pp. 638–649.
- HPCA-2014-ShinYCK #named
- NUAT: A non-uniform access time memory controller (WS, JY, JC, LSK), pp. 464–475.
- HPCA-2014-WangDDS #concurrent #multi #named #predict #source code #thread
- DraMon: Predicting memory bandwidth usage of multi-threaded programs with high accuracy and low overhead (WW, TD, JWD, MLS), pp. 380–391.
- HPCA-2014-WangFS
- Timing channel protection for a shared memory controller (YW, AF, GES), pp. 225–236.
- HPCA-2014-XieTHC #clustering #throughput
- Improving system throughput and fairness simultaneously in shared memory CMP systems via Dynamic Bank Partitioning (MX, DT, KH, XC), pp. 344–355.
- HPCA-2014-ZhangPXSX #architecture #named
- CREAM: A Concurrent-Refresh-Aware DRAM Memory architecture (TZ, MP, CX, GS, YX), pp. 368–379.
- HPCA-2014-ZhaoVZLZ0 #specification
- Over-clocked SSD: Safely running beyond flash memory chip I/O clock specs (KZ, KSV, XZ, JL, NZ, TZ), pp. 536–545.
- HPDC-2014-BestaH #fault tolerance #modelling #programming
- Fault tolerance for remote memory access programming models (MB, TH), pp. 37–48.
- HPDC-2014-GerofiSHTI #named #novel #policy
- CMCP: a novel page replacement policy for system level hierarchical memory management on many-cores (BG, AS, AH, MT, YI), pp. 73–84.
- HPDC-2014-XiaHD #named
- ConCORD: easily exploiting memory content redundancy through the content-aware service command (LX, KCH, PAD), pp. 25–36.
- HPDC-2014-ZhangJLGXI #in memory #named #programmable
- TOP-PIM: throughput-oriented programmable processing in memory (DPZ, NJ, AL, JLG, LX, MI), pp. 85–98.
- ISMM-2014-RitsonUJ #garbage collection #hardware #transaction
- Exploring garbage collection with haswell hardware transactional memory (CGR, TU, REJ), pp. 105–115.
- ISMM-2014-TereiAV #component #named #off the shelf
- M3: high-performance memory management from off-the-shelf components (DT, AA, JV), pp. 3–13.
- ISMM-2014-ZakkakP #architecture #java #named
- JDMM: a java memory model for non-cache-coherent memory architectures (FSZ, PP), pp. 83–92.
- LCTES-2014-WingbermuehleCC
- Superoptimization of memory subsystems (JGW, RKC, RDC), pp. 145–154.
- PDP-2014-FuYCL #distributed #replication
- An Exploration of Page Replication for NoC-Based On-Chip Distributed Memory Systems (WF, MY, TC, LL), pp. 410–417.
- PDP-2014-GrandjeanU #2d #clustering #difference #distributed #finite #on the #parallel
- On Partitioning Two Dimensional Finite Difference Meshes for Distributed Memory Parallel Computers (AG, BU), pp. 9–16.
- PDP-2014-Misale #approach #concurrent
- Accelerating Bowtie2 with a lock-less concurrency approach and memory affinity (CM), pp. 578–585.
- PDP-2014-RuiCGF #performance #transaction
- Evaluating the Impact of Transactional Characteristics on the Performance of Transactional Memory Applications (FR, MBC, DG, LGF), pp. 93–97.
- PDP-2014-Topa #automaton #gpu #performance
- Cellular Automata Model Tuned for Efficient Computation on GPU with Global Memory Cache (PT), pp. 380–383.
- PDP-2014-YalcinSHVWFUCF #detection #energy #fault #transaction
- Combining Error Detection and Transactional Memory for Energy-Efficient Computing below Safe Operation Margins (GY, AS, DH, AV, JTW, PF, OSÜ, AC, CF), pp. 248–255.
- PPoPP-2014-DieguesR #lightweight #named #transaction
- Time-warp: lightweight abort minimization in transactional memory (NLD, PR), pp. 167–178.
- PPoPP-2014-OdairaCT #hardware #interpreter #ruby #transaction
- Eliminating global interpreter locks in ruby through hardware transactional memory (RO, JGC, HT), pp. 131–142.
- PPoPP-2014-WangWYYWL0 #concurrent #debugging #locality #using
- Concurrency bug localization using shared memory access pairs (WW, CW, PCY, XY, ZW, JL, XF), pp. 375–376.
- ESOP-2014-Fu #abstraction #analysis
- Targeted Update — Aggressive Memory Abstraction Beyond Common Sense and Its Application on Static Numeric Analysis (ZF), pp. 534–553.
- STOC-2014-BuhrmanCKLS
- Computing with a full memory: catalytic space (HB, RC, MK, BL, FS), pp. 857–866.
- TACAS-2014-DudkaPV #contest #graph #named
- Predator: A Shape Analyzer Based on Symbolic Memory Graphs — (Competition Contribution) (KD, PP, TV), pp. 412–414.
- TACAS-2014-TomascoI0TP #c #contest #named #source code
- MU-CSeq: Sequentialization of C Programs by Shared Memory Unwindings — (Competition Contribution) (ET, OI, BF, SLT, GP), pp. 402–404.
- WRLA-2014-AlrahmanABL #concurrent #maude #modelling #question #source code
- Can We Efficiently Check Concurrent Programs Under Relaxed Memory Models in Maude? (YAA, MA, AB, ALL), pp. 21–41.
- CAV-2014-DilligDC #safety #synthesis
- Optimal Guard Synthesis for Memory Safety (TD, ID, SC), pp. 491–507.
- IJCAR-2014-StroderGBFFHS #pointer #proving #safety #source code #termination
- Proving Termination and Memory Safety for Programs with Pointer Arithmetic (TS, JG, MB, FF, CF, JH, PSK), pp. 208–223.
- SIGMOD-2013-LiP #in memory #named #performance
- BitWeaving: fast scans for main memory data processing (YL, JMP), pp. 289–300.
- SIGMOD-2013-ShaoWL #distributed #graph #named
- Trinity: a distributed graph engine on a memory cloud (BS, HW, YL), pp. 505–516.
- TPDL-2013-Prasolova-ForlandFH #3d #case study #challenge #community #experience #repository
- Creating a Repository of Community Memory in a 3D Virtual World: Experiences and Challenges (EPF, MF, LMH), pp. 425–428.
- VLDB-2013-ChasseurP #database #design #evaluation #in memory
- Design and Evaluation of Storage Organizations for Read-Optimized Main Memory Databases (CC, JMP), pp. 1474–1485.
- VLDB-2013-Kaufmann #in memory
- Storing and Processing Temporal Data in a Main Memory Column Store (MK), pp. 1444–1449.
- VLDB-2013-LiKHYYS #clustering #performance #string
- Memory Efficient Minimum Substring Partitioning (YL, PK, FH, SY, XY, SS), pp. 169–180.
- VLDB-2013-MuhlbauerRSRK0 #database #in memory
- Instant Loading for Main Memory Databases (TM, WR, RS, AR, AK, TN), pp. 1702–1713.
- VLDB-2013-SowellSCDG #analysis #in memory
- An Experimental Analysis of Iterated Spatial Joins in Main Memory (BS, MAVS, TC, AJD, JG), pp. 1882–1893.
- ICSM-2013-AnandEKSBK #abstraction #analysis #bytecode #framework #stack
- An Accurate Stack Memory Abstraction and Symbolic Analysis Framework for Executables (KA, KE, AK, MS, RB, ADK), pp. 90–99.
- ICSM-2013-SorOTS #approach #detection #machine learning #statistics #using
- Improving Statistical Approach for Memory Leak Detection Using Machine Learning (VS, PO, TT, SNS), pp. 544–547.
- WCRE-2013-ChenSB #c #detection
- Who allocated my memory? Detecting custom memory allocators in C binaries (XC, AS, HB), pp. 22–31.
- WCRE-2013-ChenSB13a #c #detection #named
- MemBrush: A practical tool to detect custom memory allocators in C binaries (XC, AS, HB), pp. 477–478.
- WCRE-2013-ClearyGVSSP #analysis #interactive #multi
- Reconstructing program memory state from multi-gigabyte instruction traces to support interactive analysis (BC, PG, EV, MADS, MS, FP), pp. 42–51.
- AIIDE-2013-KopeRK #modelling
- Modeling Autobiographical Memory for Believable Agents (AK, CR, MK).
- DiGRA-2013-Lockett #case study #game studies
- Memory of a Broken Dimension: a study in a politics of skill for experimental art games (WL).
- CHI-2013-KaufmannA #interactive #navigation #performance
- Studying spatial memory and map navigation performance on projector phones with peephole interaction (BK, DA), pp. 3173–3176.
- HCI-IMT-2013-RabeW #interactive
- Enhancing Human Computer Interaction with Episodic Memory in a Virtual Guide (FR, IW), pp. 117–125.
- HIMI-D-2013-KotaniKSA #analysis #development #using
- Analysis of Spatiotemporal Memory Using Air-Jets as Tactile Stimuli for Development of Noncontact Tactile Displays (KK, NK, SS, TA), pp. 620–627.
- HIMI-D-2013-VuH #strict
- The Influence of Password Restrictions and Mnemonics on the Memory for Passwords of Older Adults (KPLV, MMH), pp. 660–668.
- HIMI-LCCB-2013-TyllinenN #collaboration #interactive
- Supporting Group and Personal Memory in an Interactive Space for Collaborative Work (MT, MN), pp. 381–390.
- ICEIS-v1-2013-SilveiraMAC #development #library #matrix #process
- A Library to Support the Development of Applications that Process Huge Matrices in External Memory (JAS, SVGM, MVAA, VSC), pp. 153–160.
- CIKM-2013-LuoFHWB #bisimulation #graph #reduction
- External memory K-bisimulation reduction of big graphs (YL, GHLF, JH, YW, PDB), pp. 919–928.
- KDD-2013-AsadiLB #policy #realtime #twitter
- Dynamic memory allocation policies for postings in real-time Twitter search (NA, JL, MB), pp. 1186–1194.
- KDD-2013-YenCLLL #classification #coordination #linear #scalability
- Indexed block coordinate descent for large-scale linear classification with limited memory (IEHY, CFC, TWL, SWL, SDL), pp. 248–256.
- KDIR-KMIS-2013-MattaD #approach #design
- Memory Meetings — An Approach to Keep Track of Project Knowledge in Design (NM, GD), pp. 336–343.
- RecSys-2013-ZhuangCJL #matrix #parallel #performance
- A fast parallel SGD for matrix factorization in shared memory systems (YZ, WSC, YCJ, CJL), pp. 249–256.
- OOPSLA-2013-HuangB #analysis #context-sensitive grammar #performance
- Efficient context sensitivity for dynamic analyses via calling context uptrees and customized memory management (JH, MDB), pp. 53–72.
- PLDI-2013-MorissetPN #compilation #formal method #optimisation #testing
- Compiler testing via a theory of sound optimisations in the C11/C++11 memory model (RM, PP, FZN), pp. 187–196.
- POPL-2013-DemangeLZJPV #java
- Plan B: a buffered memory model for Java (DD, VL, LZ, SJ, DP, JV), pp. 329–342.
- SAS-2013-DanMVY #abstraction #modelling
- Predicate Abstraction for Relaxed Memory Models (AMD, YM, MTV, EY), pp. 84–104.
- SAS-2013-WhiteM #algebra #analysis #optimisation #using
- Concise Analysis Using Implication Algebras for Task-Local Memory Optimisation (LW, AM), pp. 433–453.
- SAC-2013-CameronCL #mining #set
- Stream mining of frequent sets with limited memory (JJC, AC, CKSL), pp. 173–175.
- SAC-2013-CastorSS #assessment #haskell #transaction
- A preliminary assessment of Haskell’s software transactional memory constructs (FC, FSN, ALMS), pp. 1696–1697.
- SAC-2013-Oikawa #file system #in memory
- Integrating memory management with a file system on a non-volatile main memory system (SO), pp. 1589–1594.
- ASPLOS-2013-DashtiFFGLLQR #approach
- Traffic management: a holistic approach to memory placement on NUMA systems (MD, AF, JRF, FG, RL, BL, VQ, MR), pp. 381–394.
- ASPLOS-2013-ParkBCLN #harmful #manycore
- Regularities considered harmful: forcing randomness to memory accesses to reduce row buffer conflicts for multi-core, multi-bank systems (HP, SB, JC, DL, SHN), pp. 181–192.
- CGO-2013-EklovNBH
- Bandwidth Bandit: Quantitative characterization of memory contention (DE, NN, DBS, EH), p. 10.
- CGO-2013-PienaarH #javascript #named #static analysis
- JSWhiz: Static analysis for JavaScript memory leaks (JAP, RH), p. 11.
- DAC-2013-AncajasCR #3d #manycore #named
- DMR3D: dynamic memory relocation in 3D multicore systems (DMA, KC, SR), p. 9.
- DAC-2013-GaribottiOBkASR #distributed #embedded #multi #thread
- Simultaneous multithreading support in embedded distributed memory MPSoCs (RG, LO, RB, Mk, CAJ, GS, MR), p. 7.
- DAC-2013-Ghosh
- Path to a TeraByte of on-chip memory for petabit per second bandwidth with < 5watts of power (SG), p. 2.
- DAC-2013-SharadFR #power management
- Ultra low power associative computing with spin neurons and resistive crossbar memory (MS, DF, KR), p. 6.
- DAC-2013-SunWL #design #power management
- Cross-layer racetrack memory design for ultra high density and low power consumption (ZS, WW, HHL), p. 6.
- DAC-2013-WangLZZC #array #clustering #multi #synthesis
- Memory partitioning for multidimensional arrays in high-level synthesis (YW, PL, PZ, CZ, JC), p. 8.
- DAC-2013-XuNMJX #comprehension #design #multi #trade-off
- Understanding the trade-offs in multi-level cell ReRAM memory design (CX, DN, NM, NPJ, YX), p. 6.
- DATE-2013-AbdullaDRSZ #hybrid #liveness #safety #transaction #verification
- Verifying safety and liveness for the FlexTM hybrid transactional memory (PAA, SD, AR, AS, YZ), pp. 785–790.
- DATE-2013-BaiS #architecture #automation #data transformation #manycore #performance
- Automatic and efficient heap data management for limited local memory multicore architectures (KB, AS), pp. 593–598.
- DATE-2013-BurgioTMB #clustering #fine-grained
- Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters (PB, GT, AM, LB), pp. 1504–1509.
- DATE-2013-CaiHMM #analysis #modelling
- Threshold voltage distribution in MLC NAND flash memory: characterization, analysis, and modeling (YC, EFH, OM, KM), pp. 1285–1290.
- DATE-2013-ChenL #2d #architecture #data access
- Dual-addressing memory architecture for two-dimensional memory access patterns (YHC, YYL), pp. 71–76.
- DATE-2013-FreitasRS #concurrent #consistency #on the fly #verification
- On-the-fly verification of memory consistency with concurrent relaxed scoreboards (LSF, EAR, LCVdS), pp. 631–636.
- DATE-2013-GomonyAG #architecture #multi #realtime
- Architecture and optimal configuration of a real-time multi-channel memory controller (MDG, BA, KG), pp. 1307–1312.
- DATE-2013-GoossensAG #policy
- Conservative open-page policy for mixed time-criticality memory controllers (SG, BA, KG), pp. 525–530.
- DATE-2013-HuZXTS #embedded #hybrid #in memory
- Software enabled wear-leveling for hybrid PCM main memory on embedded systems (JH, QZ, CJX, WCT, EHMS), pp. 599–602.
- DATE-2013-LagraaTP #concurrent #data access #data mining #identification #mining #simulation
- Data mining MPSoC simulation traces to identify concurrent memory access patterns (SL, AT, FP), pp. 755–760.
- DATE-2013-LeeJS #architecture #hybrid #performance
- Fast shared on-chip memory architecture for efficient hybrid computing with CGRAs (JL, YJ, SS), pp. 1575–1578.
- DATE-2013-LefterVTEHC #3d #integration #question
- Is TSV-based 3D integration suitable for inter-die memory repair? (ML, GRV, MT, ME, SH, SDC), pp. 1251–1254.
- DATE-2013-ManiatakosMM #array #optimisation
- AVF-driven parity optimization for MBU protection of in-core memory arrays (MM, MKM, YM), pp. 1480–1485.
- DATE-2013-MohanramWI #certification #compilation #named #order #reduction
- Mempack: an order of magnitude reduction in the cost, risk, and time for memory compiler certification (KM, MW, SI), pp. 1490–1493.
- DATE-2013-NikolaouSNOI #array #question
- Memory array protection: check on read or check on write? (PN, YS, LN, EÖ, SI), pp. 214–219.
- DATE-2013-NoguchiNAFAKNMN #energy #hybrid #performance
- D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory (HN, KN, KA, SF, EA, KK, TN, SM, HN), pp. 1813–1818.
- DATE-2013-Rodriguez-RodriguezCCPT #performance #policy #using
- Reducing writes in phase-change memory environments by using efficient cache replacement policies (RRR, FC, DC, LP, FT), pp. 93–96.
- DATE-2013-SampaioZSABH #energy #estimation #multi #video
- Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding (FS, BZ, MS, LVA, SB, JH), pp. 665–670.
- DATE-2013-SchonwaldVBR #deployment
- Shared memory aware MPSoC software deployment (TS, AV, OB, WR), pp. 1771–1776.
- DATE-2013-Xie
- Future memory and interconnect technologies (YX0), pp. 964–969.
- DATE-2013-YalcinUC #detection #fault #hardware #named #transaction #using
- FaulTM: error detection and recovery using hardware transactional memory (GY, OSÜ, AC), pp. 220–225.
- DATE-2013-YueZ #performance
- Exploiting subarrays inside a bank to improve phase change memory performance (JY, YZ), pp. 386–391.
- DATE-2013-ZhouZY #design #energy #network #using
- The design of sustainable wireless sensor network node using solar energy and phase change memory (PZ, YZ, JY), pp. 869–872.
- HPCA-2013-DasAMKA #manycore #policy
- Application-to-core mapping policies to reduce memory system interference in multi-core systems (RD, RA, OM, AK, MA), pp. 107–118.
- HPCA-2013-GoswamiCL #architecture #throughput #using
- Power-performance co-optimization of throughput core architecture using resistive memory (NG, BC, TL), pp. 342–353.
- HPCA-2013-HamCXL #energy
- Disintegrated control for energy-efficient and heterogeneous memory systems (TJH, BKC, NX, BCL), pp. 424–435.
- HPCA-2013-JacobvitzCS
- Coset coding to extend the lifetime of memory (ANJ, ARC, DJS), pp. 222–233.
- HPCA-2013-LiZL13a #energy #interface
- Exploring high-performance and energy proportional interface for phase change memory systems (ZL, RZ, TL), pp. 210–221.
- HPCA-2013-NairCQ
- A case for Refresh Pausing in DRAM memory systems (PJN, CCC, MKQ), pp. 627–638.
- HPCA-2013-QianHSQ #dependence #named #parallel #performance
- Rainbow: Efficient memory dependence recording with high replay parallelism for relaxed memory model (XQ, HH, BS, DQ), pp. 554–565.
- HPCA-2013-SubramanianSKJM #in memory #named #performance #predict
- MISE: Providing performance predictability and improving fairness in shared main memory systems (LS, VS, YK, BJ, OM), pp. 639–650.
- HPCA-2013-ZhaoCCD #transaction
- In-network traffic regulation for Transactional Memory (LZ, WC, LC, JTD), pp. 520–531.
- HPDC-2013-NicolaeC #adaptation #data access #incremental #named
- AI-Ckpt: leveraging memory access patterns for adaptive asynchronous incremental checkpointing (BN, FC), pp. 155–166.
- HPDC-2013-WangQGDSD #flexibility #named
- kMemvisor: flexible system wide memory mirroring in virtual environments (BW, ZQ, HG, HD, WS, YD), pp. 251–262.
- ISMM-2013-Musuvathi #approach #consistency #modelling
- Safety-first approach to memory consistency models (MM), pp. 1–2.
- ISMM-2013-RavitchL #c #library
- Analyzing memory ownership patterns in C libraries (TR, BL), pp. 97–108.
- ISMM-2013-WangNG #effectiveness #generative
- Generating sound and effective memory debuggers (YW, IN, RG), pp. 51–62.
- LCTES-2013-WangLWS #hybrid #named #reduction
- FTL2: a hybrid flash translation layer with logging for write reduction in flash memory (TW, DL, YW, ZS), pp. 91–100.
- PDP-2013-0002HCZ #distributed
- Asynchronous Work Stealing on Distributed Memory Systems (SL, JH, XC, CZ), pp. 198–202.
- PDP-2013-FangVSS #api #kernel #named
- ELMO: A User-Friendly API to Enable Local Memory in OpenCL Kernels (JF, ALV, JS, HJS), pp. 375–383.
- PDP-2013-MontanolaRH #distributed #sequence
- Pairwise Sequence Alignment Method for Distributed Shared Memory Systems (AM, CR, PH), pp. 432–436.
- PDP-2013-SchlimbachBK #concurrent #distributed
- Concurrent Collections on Distributed Memory Theory Put into Practice (FS, JCB, KK), pp. 225–232.
- PPoPP-2013-CarvalhoC #runtime #transaction
- Runtime elision of transactional barriers for captured memory (FMC, JPC), pp. 303–304.
- PPoPP-2013-DiceLLLM #algorithm #hardware #transaction #using
- Using hardware transactional memory to correct and simplify and readers-writer lock algorithm (DD, YL, YL, VL, MM), pp. 261–270.
- PPoPP-2013-FriedleyHBLM #distributed #manycore #performance #programming
- Ownership passing: efficient distributed memory programming on multi-core systems (AF, TH, GB, AL, CCM), pp. 177–186.
- PPoPP-2013-LePCN #modelling #performance
- Correct and efficient work-stealing for weak memory models (NML, AP, AC, FZN), pp. 69–80.
- PPoPP-2013-ShunB #framework #graph #lightweight #named
- Ligra: a lightweight graph processing framework for shared memory (JS, GEB), pp. 135–146.
- PPoPP-2013-WamhoffFFRM #concurrent #named #performance #thread #transaction
- FastLane: improving performance of software transactional memory for low thread counts (JTW, CF, PF, ER, GM), pp. 113–122.
- PPoPP-2013-WuZZJS #algorithm #analysis #complexity #design #gpu
- Complexity analysis and algorithm design for reorganizing data to minimize non-coalesced memory accesses on GPU (BW, ZZ, EZZ, YJ, XS), pp. 57–68.
- ESOP-2013-AlglaveKNT #program transformation #verification
- Software Verification for Weak Memory via Program Transformation (JA, DK, VN, MT), pp. 512–532.
- ESOP-2013-GotsmanRY #algorithm #concurrent #verification
- Verifying Concurrent Memory Reclamation Algorithms with Grace (AG, NR, HY), pp. 249–269.
- ESOP-2013-JagadeesanPPR #composition #modelling #reasoning
- Quarantining Weakness — Compositional Reasoning under Relaxed Memory Models (RJ, GP, CP, JR), pp. 492–511.
- TACAS-2013-LindenW #approach
- A Verification-Based Approach to Memory Fence Insertion in PSO Memory Systems (AL, PW), pp. 339–353.
- TACAS-2013-WhiteL #data type #evolution #identification #in memory #learning
- Identifying Dynamic Data Structures by Learning Evolving Patterns in Memory (DHW, GL), pp. 354–369.
- ICTSS-2013-VorobyovKS #approach
- A Dynamic Approach to Locating Memory Leaks (KV, PK, PS), pp. 255–270.
- ISSTA-2013-LiCWX #validation
- Dynamically validating static memory leak warnings (ML, YC, LW, G(X), pp. 112–122.
- PODS-2012-ShengT
- Dynamic top-k range reporting in external memory (CS, YT), pp. 121–130.
- SIGMOD-2012-EngleLXZFSS #data analysis #distributed #named #performance #using
- Shark: fast data analysis using coarse-grained distributed memory (CE, AL, RX, MZ, MJF, SS, IS), pp. 689–692.
- VLDB-2012-AlbutiuKN #database #in memory #manycore #parallel
- Massively Parallel Sort-Merge Joins in Main Memory Multi-Core Database Systems (MCA, AK, TN), pp. 1064–1075.
- VLDB-2013-RenTA12 #database #in memory #lightweight
- Lightweight Locking for Main Memory Database Systems (KR, AT, DJA), pp. 145–156.
- ICPC-2012-ParninR
- Programmer information needs after memory failure (CP, SR), pp. 123–132.
- ICSM-2012-QianZ #java
- Inferring weak references for fixing Java memory leaks (JQ, XZ), pp. 571–574.
- ICALP-v1-2012-JanssonSS #named #random
- CRAM: Compressed Random Access Memory (JJ, KS, WKS), pp. 510–521.
- ICFP-2012-SimoesVFJH #analysis #automation #functional #lazy evaluation #source code
- Automatic amortised analysis of dynamic memory allocation for lazy functional programs (HRS, PBV, MF, SJ, KH), pp. 165–176.
- CHI-2012-McDuffKKRC #named
- AffectAura: an intelligent system for emotional memory (DM, AKK, AK, AR, MC), pp. 849–858.
- CHI-2012-QiB #using
- Animating paper using shape memory alloys (JQ, LB), pp. 749–752.
- CSCW-2012-WhittakerKE #effectiveness
- Markup as you talk: establishing effective memory cues while still contributing to a meeting (VK, PE, SW), pp. 349–358.
- ICPR-2012-FrinkenZBBFB #modelling #network #recognition
- Long-short term memory neural networks language modeling for handwriting recognition (VF, FZM, SEB, MJCB, AF, HB), pp. 701–704.
- ICPR-2012-TirkazYS #recognition #sketching
- Memory conscious sketched symbol recognition (CT, BAY, TMS), pp. 314–317.
- KDD-2012-ChengZKC #algorithm #clique #performance
- Fast algorithms for maximal clique enumeration with limited memory (JC, LZ, YK, SC), pp. 1240–1248.
- RecSys-2012-BollenGW #retrieval
- Remembering the stars?: effect of time on preference retrieval from memory (DGFMB, MPG, MCW), pp. 217–220.
- ECOOP-2012-DiasDSL #java #source code #transaction #verification
- Verification of Snapshot Isolation in Transactional Memory Java Programs (RJD, DD, JCS, JL), pp. 640–664.
- HILT-2012-Nilsen #comprehension #java #overview #safety #tutorial
- Tutorial overview: understanding dynamic memory management in safety critical java (KN), pp. 15–22.
- PLDI-2012-LiuNPVY #modelling #synthesis
- Dynamic synthesis for relaxed memory models (FL, NN, NP, MTV, EY), pp. 429–440.
- SAC-2012-HuaS #kernel #lightweight #named
- Barrier: a lightweight hypervisor for protecting kernel integrity via memory isolation (JH, KS), pp. 1470–1477.
- SAC-2012-LeeKPCLN #realtime
- Real-time flash memory storage with Janus-FTL (JL, AK, MP, JC, DL, SHN), pp. 1799–1806.
- SAC-2012-ParkDNDKK #identification #named
- HotDataTrap: a sampling-based hot data identification scheme for flash memory (DP, BKD, YN, DHCD, YK, YK), pp. 1610–1617.
- SAC-2012-ParkSSP #algorithm #hybrid #in memory
- PRAM wear-leveling algorithm for hybrid main memory based on data buffering, swapping, and shifting (SKP, HS, DJS, KHP), pp. 1643–1644.
- SAC-2012-Wu #sorting
- Data sorting in flash memory (CHW), pp. 1847–1849.
- SAC-2012-ZhongGHCW
- Affinity-aware DMA buffer management for reducing off-chip memory access (QZ, XG, TH, XC, KW), pp. 1588–1593.
- ASPLOS-2012-OdairaN #optimisation #profiling
- Continuous object access profiling and optimizations to overcome the memory wall and bloat (RO, TN), pp. 147–158.
- ASPLOS-2012-VolosTSL #concurrent #debugging #transaction
- Applying transactional memory to concurrency bugs (HV, AJT, MMS, SL), pp. 211–222.
- CASE-2012-ZhangWZX #fault #using
- A dynamic memory model for mechanical fault diagnosis using one-class support vector machine (QZ, JW, JZ, GX), pp. 497–501.
- CGO-2012-JangLSL #automation #multi
- An automatic code overlaying technique for multicores with explicitly-managed memory hierarchies (CJ, JL, SS, JL), pp. 219–229.
- CGO-2012-MajoG #data access
- Matching memory access patterns and data placement for NUMA systems (ZM, TRG), pp. 230–241.
- DAC-2012-0001AG #realtime #runtime
- Run-time power-down strategies for real-time SDRAM memory controllers (KC, BA, KG), pp. 988–993.
- DAC-2012-CongZZ #optimisation #synthesis
- Optimizing memory hierarchy allocation with loop transformations for high-level synthesis (JC, PZ, YZ), pp. 1233–1238.
- DAC-2012-HuangCK #ram
- Joint management of RAM and flash memory with access pattern considerations (PCH, YHC, TWK), pp. 882–887.
- DAC-2012-JeongESP #cpu #gpu
- A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC (MKJ, ME, CS, NCP), pp. 850–855.
- DAC-2012-KimLCKWYL #cpu #gpu #hybrid #in memory
- Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU (DK, SL, JC, DK, DHW, SY, SL), pp. 888–896.
- DAC-2012-LearyCC #architecture #synthesis
- System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC (GL, WC, KSC), pp. 672–677.
- DAC-2012-MirhoseiniPK #energy
- Coding-based energy minimization for phase change memory (AM, MP, FK), pp. 68–76.
- DAC-2012-ShafiqueZWBH #adaptation #multi #power management #video
- Adaptive power management of on-chip video memory for multiview video coding (MS, BZ, FLW, SB, JH), pp. 866–875.
- DAC-2012-WangBDS #metadata #named #reliability
- Meta-Cure: a reliability enhancement strategy for metadata in NAND flash memory storage systems (YW, LADB, NDD, ZS), pp. 214–219.
- DAC-2012-WangW #algorithm #performance
- Observational wear leveling: an efficient algorithm for flash memory management (CW, WFW), pp. 235–242.
- DATE-2012-BathenDNG #named #variability
- VaMV: Variability-aware Memory Virtualization (LADB, NDD, AN, PG), pp. 284–287.
- DATE-2012-CaiHMM #analysis #fault #metric
- Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis (YC, EFH, OM, KM), pp. 521–526.
- DATE-2012-ChenLMABJ #3d #architecture #in memory #modelling #named
- CACTI-3DD: Architecture-level modeling for 3D die-stacked DRAM main memory (KC, SL, NM, JHA, JBB, NPJ), pp. 33–38.
- DATE-2012-JeongKKRS #named #power management
- MAPG: Memory access power gating (KJ, ABK, SK, TSR, RDS), pp. 1054–1059.
- DATE-2012-JiangSCBP #algorithm #constraints #generative #on the
- On the optimality of K longest path generation algorithm under memory constraints (JJ, MS, AC, BB, IP), pp. 418–423.
- DATE-2012-KwonKKYL #case study #in memory #ram
- A case study on the application of real phase-change RAM to main memory subsystem (SK, DK, YK, SY, SL), pp. 264–267.
- DATE-2012-LiuWWQS #embedded #process
- A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems (DL, TW, YW, ZQ, ZS), pp. 1447–1450.
- DATE-2012-MahmoodPLM #clustering #energy #optimisation
- Application-specific memory partitioning for joint energy and lifetime optimization (HM, MP, ML, EM), pp. 364–369.
- DATE-2012-Mancini #kernel #synthesis
- Enhancing non-linear kernels by an optimized memory hierarchy in a High Level Synthesis flow (SM, FR), pp. 1130–1133.
- DATE-2012-PrakashP #architecture #precise
- An instruction scratchpad memory allocation for the precision timed architecture (AP, HDP), pp. 659–664.
- DATE-2012-RamboHS #consistency #multi #on the #verification
- On ESL verification of memory consistency for system-on-chip multiprocessing (EAR, OPH, LCVdS), pp. 9–14.
- DATE-2012-SunXX #design #modelling
- Modeling and design exploration of FBDRAM as on-chip memory (GS, CX, YX), pp. 1507–1512.
- DATE-2012-TodorovMRS #approximate #automation #transaction
- Automated construction of a cycle-approximate transaction level model of a memory controller (VT, DMG, HR, US), pp. 1066–1071.
- DATE-2012-WangBSD #3d #named
- 3D-FlashMap: A physical-location-aware block mapping strategy for 3D NAND flash memory (YW, LADB, ZS, NDD), pp. 1307–1312.
- DATE-2012-WangW
- Extending the lifetime of NAND flash memory by salvaging bad blocks (CW, WFW), pp. 260–263.
- DATE-2012-ZhaCL #fault #modelling #testing
- Modeling and testing of interference faults in the nano NAND Flash memory (JZ, XC, CLL), pp. 527–531.
- DATE-2012-ZhaoYZCL #architecture #array
- Architecting a common-source-line array for bipolar non-volatile memory devices (BZ, JY, YZ, YC, HL), pp. 1451–1454.
- HPCA-2012-AyoubNR #cpu #energy #named
- JETC: Joint energy thermal and cooling management for memory and CPU subsystems in servers (RZA, RN, TR), pp. 299–310.
- HPCA-2012-JeongYSSLE #locality #parallel
- Balancing DRAM locality and parallelism in shared memory CMP systems (MKJ, DHY, DS, MS, IL, ME), pp. 53–64.
- HPCA-2012-JiangZZYC
- Improving write operations in MLC phase change memory (LJ, BZ, YZ, JY, BRC), pp. 201–210.
- HPCA-2012-LimTSACRW
- System-level implications of disaggregated memory (KTL, YT, JRS, AA, JC, PR, TFW), pp. 189–200.
- HPCA-2012-MukundanM #configuration management #multi #named #self
- MORSE: Multi-objective reconfigurable self-optimizing memory scheduler (JM, JFM), pp. 65–76.
- HPCA-2012-NegiGAGS #hardware #lazy evaluation #named #scalability #transaction
- π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory (AN, JRTG, MEA, JMG, PS), pp. 141–152.
- HPCA-2012-PanDWZ #enterprise #performance
- Quasi-nonvolatile SSD: Trading flash memory nonvolatility to improve storage system performance for enterprise applications (YP, GD, QW, TZ), pp. 179–188.
- HPDC-2012-BecchiSGPRC #clustering #multitenancy #runtime
- A virtual memory based runtime to support multi-tenancy in clusters with GPUs (MB, KS, IG, AMP, VTR, STC), pp. 97–108.
- HPDC-2012-ChenA #effectiveness #optimisation #pipes and filters
- Optimizing MapReduce for GPUs with effective shared memory usage (LC, GA), pp. 199–210.
- ISMM-2012-LyberisPNSGS #message passing
- The myrmics memory allocator: hierarchical, message-passing allocation for global address spaces (SL, PP, DSN, MS, TG, BRdS), pp. 15–24.
- ISMM-2012-OCallahan #question #using #web #why
- Why is your web browser using so much memory? (RO), pp. 1–2.
- ISMM-2012-SeweMSABRG #behaviour #comparison #java #scala #source code
- new Scala() instance of Java: a comparison of the memory behaviour of Java and Scala programs (AS, MM, AS, DA, WB, NPR, SZG), pp. 97–108.
- ISMM-2012-ZhouD #configuration management #locality #manycore #policy
- Memory management for many-core processors with software configurable locality policies (JZ, BD), pp. 3–14.
- LCTES-2012-GerardGPP #array #compilation #composition #data flow #optimisation
- A modular memory optimization for synchronous data-flow languages: application to arrays in a lustre compiler (LG, AG, CP, MP), pp. 51–60.
- LCTES-2012-WanWX
- WCET-aware data selection and allocation for scratchpad memory (QW, HW, JX), pp. 41–50.
- PDP-2012-Gaona-RamirezGAF #energy #hardware #transaction
- Dynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems (EGR, JRTG, MEA, JF), pp. 221–228.
- PPoPP-2012-BaghsorkhiGDH #evaluation #parallel #performance #thread
- Efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors (SSB, IG, MD, WmWH), pp. 23–34.
- PPoPP-2012-BaskaranVML #automation #communication #optimisation #reuse
- Automatic communication optimizations through memory reuse strategies (MMB, NV, BM, RL), pp. 277–278.
- PPoPP-2012-ZuYXWTPD #automaton #implementation #nondeterminism #performance #regular expression
- GPU-based NFA implementation for memory efficient high speed regular expression matching (YZ, MY, ZX, LW, XT, KP, QD), pp. 129–140.
- ESOP-2012-AtigBBM #decidability #modelling #question #what
- What’s Decidable about Weak Memory Models? (MFA, AB, SB, MM), pp. 26–46.
- ESOP-2012-BurckhardtGMY #concurrent #correctness #library
- Concurrent Library Correctness on the TSO Memory Model (SB, AG, MM, HY), pp. 87–107.
- ESOP-2012-Lochbihler #formal method #java
- Java and the Java Memory Model — A Unified, Machine-Checked Formalisation (AL), pp. 497–517.
- STOC-2012-BoyleGJK #multi
- Multiparty computation secure against continual memory leakage (EB, SG, AJ, YTK), pp. 1235–1254.
- TACAS-2012-JinYS #java #model checking
- Java Memory Model-Aware Model Checking (HJ, TYK, BAS), pp. 220–236.
- CAV-2012-Mador-HaimMSMAOAMSW #axiom #multi
- An Axiomatic Memory Model for POWER Multiprocessors (SMH, LM, SS, KM, JA, SO, RA, MMKM, PS, DW), pp. 495–512.
- ISSTA-2012-SuiYX #analysis #detection #using
- Static memory leak detection using full-sparse value-flow analysis (YS, DY, JX), pp. 254–264.
- ICDAR-2011-TakedaKI #database #documentation #image #performance #realtime #retrieval
- Real-Time Document Image Retrieval for a 10 Million Pages Database with a Memory Efficient and Stability Improved LLAH (KT, KK, MI), pp. 1054–1058.
- PODS-2011-ShengT11a #on the
- On finding skylines in external memory (CS, YT), pp. 107–116.
- PODS-2011-ShengT11b #2d #orthogonal
- New results on two-dimensional orthogonal range aggregation in external memory (CS, YT), pp. 129–139.
- SIGMOD-2011-BlanasLP #algorithm #design #evaluation #in memory #manycore
- Design and evaluation of main memory hash join algorithms for multi-core CPUs (SB, YL, JMP), pp. 37–48.
- SIGMOD-2011-KoltsidasV #data transformation
- Data management over flash memory (IK, SV), pp. 1209–1212.
- SIGMOD-2011-MaFL #named
- LazyFTL: a page-level flash translation layer optimized for NAND flash memory (DM, JF, GL), pp. 1–12.
- SIGMOD-2011-SchaikM #data type #performance #reachability
- A memory efficient reachability data structure through bit vector compression (SJvS, OdM), pp. 913–924.
- VLDB-2011-DingK #in memory #performance #set
- Fast Set Intersection in Memory (BD, ACK), pp. 255–266.
- VLDB-2011-GrundCM #hybrid #in memory
- A Demonstration of HYRISE — A Main Memory Hybrid Storage Engine (MG, PCM, SM), pp. 1434–1437.
- ITiCSE-2011-Esser #operating system
- Combining memory management and filesystems in an operating systems course (HGE), p. 386.
- ITiCSE-2011-MselleM #concept #education #programming
- The impact of memory transfer language (MTL) in reducing misconceptions in teaching programming to novices (LJM, RM), p. 388.
- SCAM-2011-Mehlich #c #named #validation
- CheckPointer — A C Memory Access Validator (MM), pp. 165–172.
- LATA-2011-ReidenbachS #scheduling #word
- Finding Shuffle Words That Represent Optimal Scheduling of Shared Memory Access (DR, MLS), pp. 465–476.
- FM-2011-CavalcantiWW #formal method #java #safety
- The Safety-Critical Java Memory Model: A Formal Account (AC, AJW, JW), pp. 246–261.
- FM-2011-DiosP #bound #certification #polynomial
- Certification of Safe Polynomial Memory Bounds (JdD, RP), pp. 184–199.
- CHI-2011-DenningBDJ
- Exploring implicit memory for painless password recovery (TD, KDB, MvD, AJ), pp. 2615–2618.
- CHI-2011-VeasMFS #visual notation
- Directing attention and influencing memory with visual saliency modulation (EEV, EM, SF, DS), pp. 1471–1480.
- HCI-DDA-2011-ParkSCH #image #in memory #named
- ColoriT: Color Based Image Code Application to Aid in Memory Restoration of Offline Photo Artifacts (JP, JS, JHC, TDH), pp. 637–642.
- HCI-ITE-2011-YamaguchiCR #3d
- The Effect of Haptic Cues on Working Memory in 3D Menu Selection (TY, DC, PR), pp. 158–166.
- VISSOFT-2011-ChoudhuryR #behaviour #runtime #visualisation
- Abstract visualization of runtime memory behavior (ANMIC, PR), pp. 1–8.
- ICEIS-v2-2011-BadarudinSSMM #algorithm #problem #representation #search-based
- An Improved Genetic Algorithm with Gene Value Representation and Short Term Memory for Shape Assignment Problem (IB, ABMS, MNS, AM, MTMM), pp. 178–183.
- ICEIS-v2-2011-YangLT #communication #development #how #question
- How Communication Impacts on the Development of Transactive Memory System in Task-teams? (YY, YL, FT), pp. 451–454.
- CIKM-2011-DengZFX #approach #in memory
- Information re-finding by context: a brain memory inspired approach (TD, LZ, LF, WX), pp. 1553–1558.
- KDD-2011-ChangR #convergence #linear #modelling #performance #scalability
- Selective block minimization for faster convergence of limited memory large-scale linear models (KWC, DR), pp. 699–707.
- ECOOP-2011-ChisMSSOPM
- Patterns of Memory Inefficiency (AEC, NM, ES, GS, PO, TP, JM), pp. 383–407.
- ECOOP-2011-HarmanciGF #coordination #exception #transaction
- Atomic Boxes: Coordinated Exception Handling with Transactional Memory (DH, VG, PF), pp. 634–657.
- OOPSLA-2011-HoffmanME #named #programming
- Ribbons: a partially shared memory programming model (KJH, HM, PE), pp. 289–306.
- PLDI-2011-KupersteinVY #abstraction #modelling
- Partial-coherence abstractions for relaxed memory models (MK, MTV, EY), pp. 187–198.
- PLDI-2011-XuBQR #named
- LeakChaser: helping programmers narrow down causes of memory leaks (G(X, MDB, FQ, AR), pp. 270–282.
- POPL-2011-BenderskyP #bound
- Space overhead bounds for dynamic memory management with partial compaction (AB, EP), pp. 475–486.
- ASE-2011-BotincanDDP #manycore
- Safe asynchronous multicore memory operations (MB, MD, AFD, MJP), pp. 153–162.
- ICSE-2011-KimJKY #clone detection #detection #named
- MeCC: memory comparison-based clone detector (HK, YJ, SK, KY), pp. 301–310.
- SAC-2011-ChungPK #performance #scalability
- LSTAFF*: an efficient flash translation layer for large block flash memory (TSC, DJP, JK), pp. 589–594.
- SAC-2011-KimKKK #energy #named #performance
- FMCM: a efficient flash memory cache management scheme for energy-efficient disks (YK, TK, YK, ARK), pp. 625–626.
- SAC-2011-KookHLJK #embedded #linux #optimisation
- Optimization of out of memory killer for embedded Linux environments (JK, SH, WL, EJ, JK), pp. 633–634.
- SAC-2011-LiuZ #predict #realtime
- Exploiting time predictable two-level scratchpad memory for real-time systems (YL, WZ), pp. 395–396.
- SAC-2011-SeokPP #algorithm #hybrid #in memory #migration
- Migration based page caching algorithm for a hybrid main memory of DRAM and PRAM (HS, YP, KHP), pp. 595–599.
- ASPLOS-2011-CasperOHBKO #hardware #transaction
- Hardware acceleration of transactional memory on commodity systems (JC, TO, SH, NGB, CK, KO), pp. 27–38.
- ASPLOS-2011-DalessandroCWLMSS #case study #effectiveness #hardware #hybrid #transaction
- Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory (LD, FC, SW, YL, MM, MLS, MFS), pp. 39–52.
- ASPLOS-2011-DengMRWB #in memory #named #power management
- MemScale: active low-power modes for main memory (QD, DM, LER, TFW, RB), pp. 225–238.
- ASPLOS-2011-SinghMNMM #exception #performance
- Efficient processor support for DRFx, a memory model with exceptions (AS, DM, SN, TDM, MM), pp. 53–66.
- ASPLOS-2011-VolosTS #lightweight #named #persistent
- Mnemosyne: lightweight persistent memory (HV, AJT, MMS), pp. 91–104.
- CASE-2011-Hackbarth #communication #distributed #self
- Self-organizing warehouse management based on communicating distributed memory tags (FH), pp. 232–237.
- CC-2011-MaKA #multi
- Practical Loop Transformations for Tensor Contraction Expressions on Multi-level Memory Hierarchies (WM, SK, GA), pp. 266–285.
- CGO-2011-BrueningZ
- Practical memory checking with Dr. Memory (DB, QZ), pp. 213–223.
- CGO-2011-ChakrabartiBBJS #graph #optimisation #runtime #transaction
- The runtime abort graph and its application to software transactional memory optimization (DRC, PB, HJB, PGJ, RSS), pp. 42–53.
- DAC-2011-CheC #compilation #embedded #manycore #source code
- Compilation of stream programs onto scratchpad memory based embedded multicore processors through retiming (WC, KSC), pp. 122–127.
- DAC-2011-CongHLZ
- A reuse-aware prefetching scheme for scratchpad memory (JC, HH, CL, YZ), pp. 960–965.
- DAC-2011-KimS #data access #named
- CuMAPz: a tool to analyze memory access patterns in CUDA (YK, AS), pp. 128–133.
- DAC-2011-Li
- Rethinking memory redundancy: optimal bit cell repair for maximum-information storage (XL0), pp. 316–321.
- DAC-2011-LiuZXL #clustering #hybrid #in memory #power management
- Power-aware variable partitioning for DSPs with hybrid PRAM and DRAM main memory (TL, YZ, CJX, ML), pp. 405–410.
- DAC-2011-Mador-HaimAM #consistency #how #modelling #question #testing
- Litmus tests for comparing memory consistency models: how long do they need to be? (SMH, RA, MMKM), pp. 504–509.
- DAC-2011-ParkYL #hybrid #in memory #power management
- Power management of hybrid DRAM/PRAM-based main memory (HP, SY, SL), pp. 59–64.
- DAC-2011-QinWLSG #named #performance
- MNFTL: an efficient flash translation layer for MLC NAND flash memory storage systems (ZQ, YW, DL, ZS, YG), pp. 17–22.
- DAC-2011-ReviriegoMB #ad hoc #design #fault #reliability #sequence
- Designing ad-hoc scrubbing sequences to improve memory reliability against soft errors (PR, JAM, SB), pp. 700–705.
- DAC-2011-TsengGS #comprehension
- Understanding the impact of power loss on flash memory (HWT, LMG, SS), pp. 35–40.
- DATE-2011-AkessonG #architecture #integration #modelling #predict
- Architectures and modeling of predictable memory controllers for improved system integration (BA, KG), pp. 851–856.
- DATE-2011-ChenLCP #3d #design #named
- 3D-ICML: A 3D bipolar ReRAM design with interleaved complementary memory layers (YCC, HL, YC, REP), pp. 583–586.
- DATE-2011-GilaniKS #optimisation
- Scratchpad memory optimizations for digital signal processing applications (SZG, NSK, MJS), pp. 974–979.
- DATE-2011-HuXZTS #energy #hybrid #performance #towards
- Towards energy efficient hybrid on-chip Scratch Pad Memory with non-volatile memory (JH, CJX, QZ, WCT, EHMS), pp. 746–751.
- DATE-2011-KunzGW #hardware #performance #transaction
- Improving the efficiency of a hardware transactional memory on an NoC-based MPSoC (LK, GG, FRW), pp. 1168–1171.
- DATE-2011-LangeWK #configuration management #multi
- MARC II: A parametrized speculative multi-ported memory subsystem for reconfigurable computers (HL, TW, AK), pp. 1352–1357.
- DATE-2011-PhadkeN
- MLP aware heterogeneous memory system (SP, SN), pp. 956–961.
- DATE-2011-PorquetGS #architecture #flexibility #named
- NoC-MPU: A secure architecture for flexible co-hosting on shared memory MPSoCs (JP, AG, CS), pp. 591–594.
- DATE-2011-RossiTSM #analysis #fault #performance #reliability
- Error correcting code analysis for cache memory high reliability and performance (DR, NT, MS, CM), pp. 1620–1625.
- DATE-2011-VatajeluF #analysis #in memory #robust
- Robustness analysis of 6T SRAMs in memory retention mode under PVT variations (EIV, JF), pp. 980–985.
- DATE-2011-WangLQS #reuse
- An endurance-enhanced Flash Translation Layer via reuse for NAND flash memory storage systems (YW, DL, ZQ, ZS), pp. 14–19.
- DATE-2011-WangZHLL
- Flex memory: Exploiting and managing abundant off-chip optical bandwidth (YW, LZ, YH, HL, XL), pp. 968–973.
- DATE-2011-YipYLD #challenge #design #mobile
- Challenges in designing high speed memory subsystem for mobile applications (TGY, PY, ML, DD), pp. 509–510.
- HPCA-2011-BobbaLHW #performance
- Safe and efficient supervised memory systems (JB, ML, MDH, DAW), pp. 369–380.
- HPCA-2011-ChenLZ #parallel #performance
- Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing (FC, RL, XZ), pp. 266–277.
- HPCA-2011-JoshiZL #energy #multi #named #performance
- Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system (MJ, WZ, TL), pp. 345–356.
- HPCA-2011-YoonMCRJE #fault #named
- FREE-p: Protecting non-volatile memory against both hard and soft errors (DHY, NM, JC, PR, NPJ, ME), pp. 466–477.
- HPDC-2011-SaadR #distributed #framework #named #performance #transaction
- HyFlow: a high performance distributed software transactional memory framework (MMS, BR), pp. 265–266.
- ISMM-2011-AfekDM
- Cache index-aware memory allocation (YA, DD, AM), pp. 55–64.
- ISMM-2011-AignerHKLSSU #self
- Short-term memory for self-collecting mutators (MA, AH, CMK, ML, AS, SS, AU), pp. 99–108.
- ISMM-2011-KaliberaJ #optimisation #performance #realtime
- Handles revisited: optimising performance and memory costs in a real-time collector (TK, REJ), pp. 89–98.
- ISMM-2011-MajoG #manycore
- Memory management in NUMA multicore systems: trapped between cache contention and interconnect overhead (ZM, TRG), pp. 11–20.
- ISMM-2011-Mutlu #challenge #manycore
- Memory systems in the many-core era: challenges, opportunities, and solution directions (OM), pp. 77–78.
- ISMM-2011-Tarau #multi #prolog
- Integrated symbol table, engine and heap memory management in multi-engine prolog (PT), pp. 129–138.
- ISMM-2011-WagnerGWEF #web
- Compartmental memory management in a modern web browser (GW, AG, CW, BE, MF), pp. 119–128.
- PDP-2011-CastroGMMFS #analysis #architecture #manycore #transaction
- Analysis and Tracing of Applications Based on Software Transactional Memory on Multicore Architectures (MBC, KG, VMM, JFM, LGF, MS), pp. 199–206.
- PDP-2011-KarantasisP #abstraction #clustering #gpu #programming
- Programming GPU Clusters with Shared Memory Abstraction in Software (KIK, EDP), pp. 223–230.
- PDP-2011-TanabeOTJ #functional #multi
- Scaleable Sparse Matrix-Vector Multiplication with Functional Memory and GPUs (NT, YO, MT, KJ), pp. 101–108.
- PDP-2011-ZengTL #algorithm #hybrid #transaction
- Parallization of Adaboost Algorithm through Hybrid MPI/OpenMP and Transactional Memory (KZ, YT, FL), pp. 94–100.
- PPoPP-2011-BauerCSA #parallel #programming
- Programming the memory hierarchy revisited: supporting irregular parallelism in sequoia (MB, JC, ES, AA), pp. 13–24.
- PPoPP-2011-BotincanDDP #automation #proving #safety
- Automatic safety proofs for asynchronous memory operations (MB, MD, AFD, MJP), pp. 313–314.
- PPoPP-2011-FernandesC #multi #scalability #transaction
- Lock-free and scalable multi-version software transactional memory (SMF, JPC), pp. 179–188.
- PPoPP-2011-KourtisKGK #named
- CSX: an extended compression format for spmv on shared memory systems (KK, VK, GIG, NK), pp. 247–256.
- PPoPP-2011-LesaniP #communication #transaction
- Communicating memory transactions (ML, JP), pp. 157–168.
- PPoPP-2011-RoyHH #consistency
- Weak atomicity under the x86 memory consistency model (AR, SH, TLH), pp. 291–292.
- ESOP-2011-BieniusaT #proving #transaction
- Proving Isolation Properties for Software Transactional Memory (AB, PT), pp. 38–56.
- TACAS-2011-BurnimSS #consistency #modelling #monitoring
- Sound and Complete Monitoring of Sequential Consistency for Relaxed Memory Models (JB, KS, CS), pp. 11–25.
- CAV-2011-AlglaveM #modelling
- Stability in Weak Memory Models (JA, LM), pp. 50–66.
- CAV-2011-BerdineCI #named #safety
- SLAyer: Memory Safety for Systems-Level Code (JB, BC, SI), pp. 178–183.
- ISSTA-2011-BurnimSS #concurrent #modelling #source code #testing
- Testing concurrent programs on relaxed memory models (JB, KS, CS), pp. 122–132.
- SIGMOD-2010-JonesAM #concurrent #database #in memory
- Low overhead concurrency control for partitioned main memory databases (EPCJ, DJA, SM), pp. 603–614.
- SIGMOD-2010-KimWS #approach #independence #performance
- Page-differential logging: an efficient and DBMS-independent approach for storing data into flash memory (YRK, KYW, IYS), pp. 363–374.
- VLDB-2010-ZhangS
- The HV-tree: a Memory Hierarchy Aware Version Index (RZ, MS), pp. 397–408.
- VLDB-2011-GrundKPZCM10 #hybrid #in memory #named
- HYRISE — A Main Memory Hybrid Storage Engine (MG, JK, HP, AZ, PCM, SM), pp. 105–116.
- SCAM-2010-KetterlinC #behaviour #execution #source code
- Recovering the Memory Behavior of Executable Programs (AK, PC), pp. 189–198.
- SCAM-2010-SimpsonB #c #named #runtime #safety
- MemSafe: Ensuring the Spatial and Temporal Memory Safety of C at Runtime (MSS, RB), pp. 199–208.
- CIG-2010-BromBK
- Timing in episodic memory for virtual characters (CB, OB, RK), pp. 305–312.
- CHI-2010-KalnikaiteSWK #comprehension #how
- Now let me see where i was: understanding how lifelogs mediate memory (VK, AS, SW, DSK), pp. 2045–2054.
- SOFTVIS-2010-RobertsonCL #named #visualisation
- AllocRay: memory allocation visualization for unmanaged languages (GGR, TMC, BL), pp. 43–52.
- SOFTVIS-2010-ThorsenW #comprehension #consistency #interactive #visualisation
- Understanding relaxed memory consistency through interactive visualization (ØT, CW), pp. 223–224.
- CIKM-2010-GargNB #algorithm #performance #realtime
- Real-time memory efficient data redundancy removal algorithm (VKG, AN, SB), pp. 1259–1268.
- CIKM-2010-SpringmannKS #image #retrieval #sketching
- Image retrieval at memory’s edge: known image search based on user-drawn sketches (MS, IAK, HS), pp. 1465–1468.
- ICML-2010-BartlettPW #constant #process
- Forgetting Counts: Constant Memory Inference for a Dependent Hierarchical Pitman-Yor Process (NB, DP, FW), pp. 63–70.
- KDD-2010-MaxwellBR #graph #mining #using
- Diagnosing memory leaks using graph mining on heap dumps (EKM, GB, NR), pp. 115–124.
- KDD-2010-YuHCL #classification #in memory #linear #scalability
- Large linear classification when data cannot fit in memory (HFY, CJH, KWC, CJL), pp. 833–842.
- OOPSLA-2010-DilligDA #abstraction #axiom #invariant
- Symbolic heap abstraction with demand-driven axiomatization of memory invariants (ID, TD, AA), pp. 397–410.
- OOPSLA-2010-OgataMKTO #case study #java
- A study of Java’s non-Java memory (KO, DM, KK, ST, TO), pp. 191–204.
- OOPSLA-2010-UpadhyayaMP #automation #identification #source code
- Automatic atomic region identification in shared memory SPMD programs (GU, SPM, VSP), pp. 652–670.
- PLDI-2010-FlanaganF #detection
- Adversarial memory for detecting destructive races (CF, SNF), pp. 244–254.
- PLDI-2010-MarinoSMMN #concurrent #named #performance #programming language
- DRFX: a simple and efficient memory model for concurrent programming languages (DM, AS, TDM, MM, SN), pp. 351–362.
- PLDI-2010-TorlakVD #axiom #modelling #named #specification
- MemSAT: checking axiomatic specifications of memory models (ET, MV, JD), pp. 341–350.
- PLDI-2010-YangXKZ #compilation #optimisation #parallel
- A GPGPU compiler for memory optimization and parallelism management (YY, PX, JK, HZ), pp. 86–97.
- POPL-2010-AtigBBM #modelling #on the #problem #verification
- On the verification problem for weak memory models (MFA, AB, SB, MM), pp. 7–18.
- SAS-2010-Goldberg #framework #in memory #optimisation #pipes and filters #validation
- Translation Validation of Loop Optimizations and Software Pipelining in the TVOC Framework — In Memory of Amir Pnueli (BG), pp. 6–21.
- ASE-2010-KimYS #debugging #model checking #named #using
- JRF-E: using model checking to give advice on eliminating memory model-related bugs (KK, TYK, BAS), pp. 215–224.
- FSE-2010-SumnerZ
- Memory indexing: canonicalizing addresses across executions (WNS, XZ), pp. 217–226.
- ICSE-2010-ClauseO #named
- LEAKPOINT: pinpointing the causes of memory leaks (JAC, AO), pp. 515–524.
- SAC-2010-HeoGEKJ #energy #performance
- Energy efficient program updating for sensor nodes with flash memory (JH, BG, SIE, PK, GJ), pp. 194–200.
- SAC-2010-KrajcaV #functional #parallel #transaction
- Software transactional memory for implicitly parallel functional language (PK, VV), pp. 2123–2130.
- SAC-2010-SchoeberlBV #named #realtime #transaction
- RTTM: real-time transactional memory (MS, FB, JV), pp. 326–333.
- LDTA-2009-DennisJW10 #algorithm #analysis #automation #named
- SLAMM — Automating Memory Analysis for Numerical Algorithms (JMD, ERJ, WMW), pp. 89–104.
- ASPLOS-2010-EbrahimiLMP #configuration management #manycore
- Fairness via source throttling: a configurable and high-performance fairness substrate for multi-core memory systems (EE, CJL, OM, YNP), pp. 335–346.
- ASPLOS-2010-GeladoCNSPH #distributed #parallel #symmetry
- An asymmetric distributed shared memory model for heterogeneous parallel systems (IG, JC, NN, JES, SJP, WmWH), pp. 347–358.
- ASPLOS-2010-IpekCNBM #reliability
- Dynamically replicated memory: building reliable systems from nanoscale resistive memories (EI, JC, EBN, DB, TM), pp. 3–14.
- ASPLOS-2010-RomanescuLS #consistency #specification #verification
- Specifying and dynamically verifying address translation-aware memory consistency (BFR, ARL, DJS), pp. 323–334.
- ASPLOS-2010-YoonE #flexibility #in memory
- Virtualized and flexible ECC for main memory (DHY, ME), pp. 397–408.
- CC-2010-BurckhardtMS #modelling #verification
- Verifying Local Transformations on Relaxed Memory Models (SB, MM, VS), pp. 104–123.
- CGO-2010-GottschlichVS #performance #transaction #using
- An efficient software transactional memory using commit-time invalidation (JEG, MV, JGS), pp. 101–110.
- CGO-2010-Srisa-anCSS #self
- A self-adjusting code cache manager to balance start-up time and memory usage (WSa, MBC, YS, MS), pp. 82–91.
- CGO-2010-WangWY #layout #on the
- On improving heap memory layout by dynamic pool allocation (ZW, CW, PCY), pp. 92–100.
- CGO-2010-ZhaoBA #named #performance #scalability
- Umbra: efficient and scalable memory shadowing (QZ, DB, SPA), pp. 22–31.
- DAC-2010-ElizehN #embedded
- Embedded memory binding in FPGAs (KE, NN), pp. 457–462.
- DAC-2010-IosifidisMMGBSC #automation #framework #optimisation #parallel #platform
- A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms (YI, AM, SM, EdG, AB, DS, FC), pp. 549–554.
- DAC-2010-YuP #clustering #manycore #platform
- Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms (CY, PP), pp. 132–137.
- DATE-2010-BenitezMRL #configuration management
- A reconfigurable cache memory with heterogeneous banks (DB, JCM, DR, EL), pp. 825–830.
- DATE-2010-ChenLJC #distributed #manycore #using
- Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller (XC, ZL, AJ, SC), pp. 39–44.
- DATE-2010-ChenLWZXZ #random #self
- A nondestructive self-reference scheme for Spin-Transfer Torque Random Access Memory (STT-RAM) (YC, HL, XW, WZ, WX, TZ), pp. 148–153.
- DATE-2010-ChenW #adaptation #random
- An adaptive code rate EDAC scheme for random access memory (CYC, CWW), pp. 735–740.
- DATE-2010-ChenYW #named
- PM-COSYN: PE and memory co-synthesis for MPSoCs (YJC, CLY, PHW), pp. 1590–1595.
- DATE-2010-DasMZC #detection #hardware #information management
- Detecting/preventing information leakage on the memory bus due to malicious hardware (AD, GM, JZ, ANC), pp. 861–866.
- DATE-2010-FacchiniMCD #3d #configuration management
- An RDL-configurable 3D memory tier to replace on-chip SRAM (MF, PM, FC, WD), pp. 291–294.
- DATE-2010-FerreiraZBCMM #in memory
- Increasing PCM main memory lifetime (APF, MZ, SB, BRC, RGM, DM), pp. 914–919.
- DATE-2010-GoorGH #testing
- Memory testing with a RISC microcontroller (AJvdG, GG, SH), pp. 214–219.
- DATE-2010-JooNDSCX #design #energy
- Energy- and endurance-aware design of phase change memory caches (YJ, DN, XD, GS, NC, YX), pp. 136–141.
- DATE-2010-LoiB #3d #distributed #framework #interface #manycore #performance
- An efficient distributed memory interface for many-core platform with 3D stacked DRAM (IL, LB), pp. 99–104.
- DATE-2010-MarongiuRB #manycore #performance
- Efficient OpenMP data mapping for multicore platforms with vertically stacked memory (AM, MR, LB), pp. 105–110.
- DATE-2010-MohanGS #named
- FlashPower: A detailed power model for NAND flash memory (VM, SG, MRS), pp. 502–507.
- DATE-2010-PellizzoniSCCT #analysis #manycore
- Worst case delay analysis for memory interference in multicore systems (RP, AS, JJC, MC, LT), pp. 741–746.
- DATE-2010-TakaseTT #clustering #multi
- Partitioning and allocation of scratch-pad memory for priority-based preemptive multi-task systems (HT, HT, HT), pp. 1124–1129.
- DATE-2010-WhittySHEP #architecture #configuration management #performance
- Application-specific memory performance of a heterogeneous reconfigurable architecture (SW, HS, BH, RE, WPR), pp. 387–392.
- HPCA-2010-KimHMH #algorithm #multi #named #scalability #scheduling
- ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers (YK, DH, OM, MHB), pp. 1–12.
- HPCA-2010-LiuJS #clustering #comprehension #how #multi #performance
- Understanding how off-chip memory bandwidth partitioning in Chip Multiprocessors affects system performance (FL, XJ, YS), pp. 1–12.
- HPCA-2010-WooSLL #3d #architecture
- An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth (DHW, NHS, DLL, HHSL), pp. 1–12.
- HPDC-2010-MontanerSD #low cost
- A practical way to extend shared memory support beyond a motherboard at low cost (HM, FS, JD), pp. 155–166.
- ISMM-2010-AlbertGG #garbage collection #parametricity #requirements
- Parametric inference of memory requirements for garbage collected languages (EA, SG, MGZ), pp. 121–130.
- ISMM-2010-Sewell #abstraction
- Memory, an elusive abstraction (PS), pp. 51–52.
- ISMM-2010-ZhaoBA #architecture #performance
- Efficient memory shadowing for 64-bit architectures (QZ, DB, SPA), pp. 93–102.
- LCTES-2010-KimLSP #multi
- Operation and data mapping for CGRAs with multi-bank memory (YK, JL, AS, YP), pp. 17–26.
- LCTES-2010-LiXLZ #analysis #approximate #architecture
- Analysis and approximation for bank selection instruction minimization on partitioned memory architecture (ML, CJX, TL, YZ), pp. 1–8.
- LCTES-2010-WangLWQSG #named
- RNFTL: a reuse-aware NAND flash translation layer for flash memory (YW, DL, MW, ZQ, ZS, YG), pp. 163–172.
- PDP-2010-BertolliMV #grid #pervasive #requirements
- Analyzing Memory Requirements for Pervasive Grid Applications (CB, GM, MV), pp. 297–301.
- PDP-2010-SantoRSZ #clustering #distributed #parallel #transaction
- Software Distributed Shared Memory with Transactional Coherence — A Software Engine to Run Transactional Shared-memory Parallel Applications on Clusters (MDS, NR, CS, EZ), pp. 175–179.
- PPoPP-2010-BarretoDFGK #parallel #transaction
- Leveraging parallel nesting in transactional memory (JB, AD, PF, RG, MK), pp. 91–100.
- PPoPP-2010-DashD #distributed #transaction
- Symbolic prefetching in transactional distributed shared memory (AD, BD), pp. 331–332.
- PPoPP-2010-LupeiSPMBKA #game studies #parallel #scalability #towards #transaction #using
- Towards scalable and transparent parallelization of multiplayer games using transactional memory support (DL, BS, DP, MM, MB, WK, CA), pp. 325–326.
- PPoPP-2010-MaldonadoMFSHFLM #scheduling #transaction
- Scheduling support for transactional memory contention management (WM, PM, PF, AS, DH, AF, JLL, GM), pp. 79–90.
- PPoPP-2010-MannarswamyCRS #compilation #performance #transaction
- Compiler aided selective lock assignment for improving the performance of software transactional memory (SM, DRC, KR, SS), pp. 37–46.
- PPoPP-2010-PorterW #modelling #performance #transaction
- Modeling transactional memory workload performance (DEP, EW), pp. 349–350.
- PPoPP-2010-ZyulkyarovHUCV #debugging #source code #transaction
- Debugging programs that use atomic blocks and transactional memory (FZ, TH, OSÜ, AC, MV), pp. 57–66.
- ESOP-2010-FerreiraFS #concurrent #logic #modelling
- Parameterized Memory Models and Concurrent Separation Logic (RF, XF, ZS), pp. 267–286.
- ESOP-2010-JagadeesanPR #generative #modelling #semantics
- Generative Operational Semantics for Relaxed Memory Models (RJ, CP, JR), pp. 307–326.
- FASE-2010-DistefanoF #detection #java
- Memory Leaks Detection in Java by Bi-abductive Inference (DD, IF), pp. 278–292.
- STOC-2010-VerbinZ #bound
- The limits of buffering: a tight lower bound for dynamic membership in the external memory model (EV, QZ), pp. 447–456.
- TACAS-2010-DonaldsonKR #analysis #automation #manycore
- Automatic Analysis of Scratch-Pad Memory Code for Heterogeneous Multicore Processors (AFD, DK, PR), pp. 280–295.
- CAV-2010-AlglaveMSS #modelling
- Fences in Weak Memory Models (JA, LM, SS, PS), pp. 258–272.
- CAV-2010-Mador-HaimAM #consistency #generative #modelling #testing
- Generating Litmus Tests for Contrasting Memory Consistency Models (SMH, RA, MMKM), pp. 273–287.
- CAV-2010-Michael #algorithm #concurrent
- Memory Management in Concurrent Algorithms (MMM), p. 23.
- ISSTA-2010-GodefroidK #float #program analysis #proving #safety
- Proving memory safety of floating-point computations by combining static and dynamic program analysis (PG, JK), pp. 1–12.
- SIGMOD-2009-BinnigHF #in memory #string
- Dictionary-based order-preserving string compression for main memory column stores (CB, SH, FF), pp. 283–296.
- SIGMOD-2009-ChenGWX #exclamation
- Search your memory ! — an associative memory based desktop search system (JC, HG, WW, CX), pp. 1099–1102.
- SIGMOD-2009-Freitas
- Storage class memory: technology, systems and applications (RFF), pp. 985–986.
- SIGMOD-2009-LeeMP #database #enterprise #roadmap
- Advances in flash memory SSD technology for enterprise database applications (SWL, BM, CP), pp. 863–870.
- ICPC-J-2008-BinkleyLMM09 #identifier
- Identifier length and limited programmer memory (DB, DL, SM, CM), pp. 430–445.
- FM-2009-Gast #reasoning
- Reasoning about Memory Layouts (HG), pp. 628–643.
- FM-2009-SchierlSHR #file system #specification
- Abstract Specification of the UBIFS File System for Flash Memory (AS, GS, DH, WR), pp. 190–206.
- IFM-2009-HasanAT #analysis #array #configuration management #fault #probability
- Formal Probabilistic Analysis of Stuck-at Faults in Reconfigurable Memory Arrays (OH, NA, ST), pp. 277–291.
- DiGRA-2009-Mukherjee #game studies #how
- 'Remembering How You Died': Memory, Death and Temporality in Videogames [Extended Abstract] (SM).
- CHI-2009-BudiuPH #how
- Remembrance of things tagged: how tagging effort affects tag production and human memory (RB, PP, LH), pp. 615–624.
- VISSOFT-2009-Reiss #detection #java #problem #visualisation
- Visualizing the Java heap to detect memory problems (SPR), pp. 73–80.
- CIKM-2009-ChenGWW #named
- iMecho: an associative memory based desktop search system (JC, HG, WW, WW), pp. 731–740.
- SIGIR-2009-Chen #retrieval
- Exploiting memory cues in personal lifelog retrieval (YC), p. 856.
- ECOOP-2009-VolosWASTN #design #implementation #named #parallel #transaction
- NePaLTM: Design and Implementation of Nested Parallelism for Transactional Memory Systems (HV, AW, ARAT, TS, XT, RN), pp. 123–147.
- OOPSLA-2009-Ogasawara #garbage collection #thread
- NUMA-aware memory manager with dominant-thread-based copying GC (TO), pp. 377–390.
- PLDI-2009-DragojevicGK #transaction
- Stretching transactional memory (AD, RG, MK), pp. 155–165.
- PLDI-2009-InoueKN #case study #manycore
- A study of memory management for web-based applications on multicore processors (HI, HK, TN), pp. 386–396.
- PLDI-2009-MehraraHHM #hardware #low cost #transaction #using
- Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory (MM, JH, PCH, SAM), pp. 166–176.
- PLDI-2009-NagarakatteZMZ #bound #c #named #safety
- SoftBound: highly compatible and complete spatial memory safety for c (SN, JZ, MMKM, SZ), pp. 245–258.
- PLDI-2009-NovarkBZ
- Efficiently and precisely locating memory leaks and bloat (GN, EDB, BGZ), pp. 397–407.
- POPL-2009-BoudolP #approach #modelling
- Relaxed memory models: an operational approach (GB, GP), pp. 392–403.
- POPL-2009-GuerraouiK #semantics #transaction
- The semantics of progress in lock-based transactional memory (RG, MK), pp. 404–415.
- POPL-2009-Harris #transaction
- Language constructs for transactional memory (TH), p. 1.
- ASE-2009-KimYS #concurrent #detection #heuristic #model checking #precise #using
- Precise Data Race Detection in a Relaxed Memory Model Using Heuristic-Based Model Checking (KK, TYK, BAS), pp. 495–499.
- ESEC-FSE-2009-VarmaSS
- Backward-compatible constant-time exception-protected memory (PV, RKS, HJS), pp. 71–80.
- SAC-2009-FilhoNLA #framework #mobile #using #visualisation
- A framework for text visualization using memory traffic management for mobile devices (JBFF, JdSRN, CRFL, RMCA), pp. 1847–1848.
- SAC-2009-GroppeGEL #in memory #performance #strict
- Efficient processing of SPARQL joins in memory by dynamically restricting triple patterns (JG, SG, SE, VL), pp. 1231–1238.
- SAC-2009-ImS #architecture
- Storage architecture and software support for SLC/MLC combined flash memory (SI, DS), pp. 1664–1669.
- SAC-2009-JungHKY #evaluation #reliability
- A practical evaluation of large-memory data processing on a reliable remote memory system (HJ, HH, SGK, HYY), pp. 343–344.
- SAC-2009-LiuYWJX #adaptation #scalability
- An adaptive block-set based management for large-scale flash memory (ZL, LY, PW, PJ, XX), pp. 1621–1625.
- ASPLOS-2009-CaulfieldGS #clustering #data-driven #named #performance #power management #using
- Gordon: using flash memory to build fast, power-efficient clusters for data-intensive applications (AMC, LMG, SS), pp. 217–228.
- ASPLOS-2009-DeviettiLCO #multi #named
- DMP: deterministic shared memory multiprocessing (JD, BL, LC, MO), pp. 85–96.
- ASPLOS-2009-DiceLMN #experience #hardware #implementation #transaction
- Early experience with a commercial hardware transactional memory implementation (DD, YL, MM, DN), pp. 157–168.
- CC-2009-AbadiBHHI #implementation #transaction #using
- Implementation and Use of Transactional Memory with Dynamic Separation (MA, AB, TH, JH, MI), pp. 63–77.
- CGO-2009-SpearMSW #transaction
- Reducing Memory Ordering Overheads in Software Transactional Memory (MFS, MMM, MLS, PW), pp. 13–24.
- DAC-2009-AmadorPR #architecture #problem
- Optimum LDPC decoder: a memory architecture problem (EA, RP, VR), pp. 891–896.
- DAC-2009-BaiocchiC #in memory #using
- Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators (JB, BRC), pp. 744–749.
- DAC-2009-DhimanAR #hybrid #in memory #named
- PDRAM: a hybrid PRAM and DRAM main memory system (GD, RZA, TR), pp. 664–469.
- DAC-2009-GeMW #configuration management #pipes and filters
- A DVS-based pipelined reconfigurable instruction memory (ZG, TM, WFW), pp. 897–902.
- DAC-2009-YooYC #design #multi #performance
- Multiprocessor System-on-Chip designs with active memory processors for higher memory efficiency (JhY, SY, KC), pp. 806–811.
- DATE-2009-ChoSE #named #realtime
- KAST: K-associative sector translation for NAND flash memory in real-time systems (HjC, DS, YIE), pp. 507–512.
- DATE-2009-FahmyRJ #bound #distributed #multi #on the #realtime #transaction
- On bounding response times under software transactional memory in distributed multiprocessor real-time systems (SFF, BR, EDJ), pp. 688–693.
- DATE-2009-FerrariNGRG #component #implementation #trade-off
- Time and memory tradeoffs in the implementation of AUTOSAR components (AF, MDN, GG, GR, PG), pp. 864–869.
- DATE-2009-GhoseGDAW #architecture #detection
- Architectural support for low overhead detection of memory violations (SG, LG, PD, AA, CW), pp. 652–657.
- DATE-2009-HsiehH #3d #design
- Thermal-aware memory mapping in 3D designs (ACH, TH), pp. 1361–1366.
- DATE-2009-KhajehGDKEKA #design #named #reliability
- TRAM: A tool for Temperature and Reliability Aware Memory Design (AK, AG, ND, FJK, AME, KSK, MSA), pp. 340–345.
- DATE-2009-LiC #architecture #bibliography #tool support
- An overview of non-volatile memory technology and the implication for tools and architectures (HL, YC), pp. 731–736.
- DATE-2009-MarongiuB #performance
- Efficient OpenMP support and extensions for MPSoCs with explicitly managed memory hierarchy (AM, LB), pp. 809–814.
- DATE-2009-OzturkK #compilation #execution #using
- Using dynamic compilation for continuing execution under reduced memory availability (ÖÖ, MTK), pp. 1373–1378.
- DATE-2009-RobertsKM #energy #using
- Using non-volatile memory to save energy in servers (DR, TK, TNM), pp. 743–748.
- DATE-2009-SuCGSP #named #operating system
- SecBus: Operating System controlled hierarchical page-based memory bus protection (LS, SC, PG, CS, RP), pp. 570–573.
- HPCA-2009-ChenLHCSWP #consistency #performance #verification
- Fast complete memory consistency verification (YC, YL, WH, TC, HS, PW, HP), pp. 381–392.
- HPCA-2009-DeOrioWB #design #manycore #named #validation
- Dacota: Post-silicon validation of the memory subsystem in multi-core designs (AD, IW, VB), pp. 405–416.
- HPCA-2009-HurL #feedback #probability
- Feedback mechanisms for improving probabilistic memory prefetching (IH, CL), pp. 443–454.
- HPCA-2009-SeoLS #design #implementation #multi
- Design and implementation of software-managed caches for multicores with local memory (SS, JL, ZS), pp. 55–66.
- HPCA-2009-WenischFAFM #metadata #streaming
- Practical off-chip meta-data for temporal memory streaming (TFW, MF, AA, BF, AM), pp. 79–90.
- HPDC-2009-WangLL #performance #transaction
- Investigating transactional memory performance on ccNUMA machines (RW, KL, XL), pp. 67–68.
- ISMM-2009-JulaR #locality
- Two memory allocators that use hints to improve locality (AJ, LR), pp. 109–118.
- LCTES-2009-CaspiCGPR #policy #scheduling
- Synchronous objects with scheduling policies: introducing safe shared memory in lustre (PC, JLC, LG, MP, PR), pp. 11–20.
- LCTES-2009-MankinKA #embedded #manycore #transaction
- Software transactional memory for multicore embedded systems (JM, DRK, JA), pp. 90–98.
- PDP-2009-AnsariJKLKW #profiling #transaction
- Profiling Transactional Memory Applications (MA, KJ, CK, ML, CCK, IW), pp. 11–20.
- PDP-2009-BadiaPAL #architecture #manycore #modelling #programming
- Impact of the Memory Hierarchy on Shared Memory Architectures in Multicore Programming Models (RMB, JMP, EA, JL), pp. 437–445.
- PDP-2009-Barker #cpu #manycore
- Realities of Multi-Core CPU Chips and Memory Contention (DPB), pp. 446–453.
- PPoPP-2009-AbadiHM #hardware #off the shelf #transaction #using
- Transactional memory with strong atomicity using off-the-shelf memory protection hardware (MA, TH, MM), pp. 185–196.
- PPoPP-2009-DashD #distributed #transaction
- Software transactional distributed shared memory (AD, BD), pp. 297–298.
- PPoPP-2009-KangB #algorithm #graph #performance #transaction
- An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs (SK, DAB), pp. 15–24.
- PPoPP-2009-SchneiderYRLSN #comparison #modelling #multi #programming
- A comparison of programming models for multiprocessors with explicitly managed memory hierarchies (SS, JSY, BR, JCL, AS, DSN), pp. 131–140.
- PPoPP-2009-SpearDMS #transaction
- A comprehensive strategy for contention management in software transactional memory (MFS, LD, VJM, MLS), pp. 141–150.
- PPoPP-2009-VolosWASTN #design #implementation #named #parallel #transaction
- NePalTM: design and implementation of nested parallelism for transactional memory systems (HV, AW, ARAT, TS, XT, RN), pp. 291–292.
- PPoPP-2009-ZyulkyarovGUCAHV #game studies #interactive #multi #transaction #using
- Atomic quake: using transactional memory in an interactive multiplayer game server (FZ, VG, OSÜ, AC, EA, TH, MV), pp. 25–34.
- SOSP-2009-ConditNFILBC #persistent
- Better I/O through byte-addressable, persistent memory (JC, EBN, CF, EI, BCL, DB, DC), pp. 133–146.
- WRLA-2008-Hills09 #logic #semantics
- Memory Representations in Rewriting Logic Semantics Definitions (MH0), pp. 155–172.
- ESOP-2009-Campbell #analysis #data type #using
- Amortised Memory Analysis Using the Depth of Data Structures (BC), pp. 190–204.
- ESOP-2009-Sumii #for free #formal method
- A Theory of Non-monotone Memory (Or: Contexts for free) (ES), pp. 237–251.
- CAV-2009-GuerraouiHS #modelling #transaction
- Software Transactional Memory on Relaxed Memory Models (RG, TAH, VS), pp. 321–336.
- CAV-2009-GuerraouiK #transaction
- Transactional Memory: Glimmer of a Theory (RG, MK), pp. 1–15.
- ISSTA-2009-XinZ #slicing
- Memory slicing (BX, XZ), pp. 165–176.
- VMCAI-2009-RakamaricH #low level #scalability
- A Scalable Memory Model for Low-Level Code (ZR, AJH), pp. 290–304.
- ECDL-2008-Liu #approach
- A Participative Digital Archiving Approach to University History and Memory (JL), pp. 135–147.
- SIGMOD-2008-LeeMPKK #database #enterprise
- A case for flash memory ssd in enterprise database applications (SWL, BM, CP, JMK, SWK), pp. 1075–1086.
- VLDB-2008-DalviKS #graph #keyword
- Keyword search on external memory data graphs (BBD, MK, SS), pp. 1189–1204.
- VLDB-2008-Hill #question #transaction
- Is transactional memory an oxymoron? (MDH), p. 1.
- VLDB-2008-KallmanKNPRZJMSZHA #distributed #in memory #named #transaction
- H-store: a high-performance, distributed main memory transaction processing system (RK, HK, JN, AP, AR, SBZ, EPCJ, SM, MS, YZ, JH, DJA), pp. 1496–1499.
- VLDB-2008-KoltsidasMV #sorting
- Sorting hierarchical data in external memory for archiving (IK, HM, SV), pp. 1205–1216.
- ICPC-2008-BinkleyLMM
- Impact of Limited Memory Resources (DB, DL, SM, CM), pp. 83–92.
- ICSM-2008-JeffreyGG #debugging #identification #using
- Identifying the root causes of memory bugs using corrupted memory location suppression (DJ, NG, RG), pp. 356–365.
- PASTE-2008-DeRD #java #validation
- Java memory model aware software validation (AD, AR, DD), pp. 8–14.
- SEFM-2008-PhamTTC #algorithm #bound #java #performance
- A Fast Algorithm to Compute Heap Memory Bounds of Java Card Applets (THP, AHT, NTT, WNC), pp. 259–267.
- CHI-2008-GrimesTHSR
- Feasibility and pragmatics of classifying working memory load with an electroencephalograph (DBG, DST, SEH, PS, RPNR), pp. 835–844.
- CHI-2008-WuBRBM #distributed #product line
- Collaborating to remember: a distributed cognition account of families coping with memory impairments (MW, JPB, BR, RB, MM), pp. 825–834.
- CSCW-2008-SarcevicMLB
- Transactive memory in trauma resuscitation (AS, IM, MEL, RSB), pp. 215–224.
- CIKM-2008-Aguilar-SaboritJSM #performance #pipes and filters
- Exploiting pipeline interruptions for efficient memory allocation (JAS, MJ, DS, VMM), pp. 639–648.
- ICML-2008-GomesWP #bound #modelling #topic
- Memory bounded inference in topic models (RG, MW, PP), pp. 344–351.
- ECOOP-2008-SevcikA #java #on the #program transformation
- On Validity of Program Transformations in the Java Memory Model (JS, DA), pp. 27–51.
- ECOOP-2008-SomanKD #multi #named #runtime #scalability
- MTM2: Scalable Memory Management for Multi-tasking Managed Runtime Environments (SS, CK, LD), pp. 335–361.
- OOPSLA-2008-BondM
- Tolerating memory leaks (MDB, KSM), pp. 109–126.
- OOPSLA-2008-KawachiyaOO #analysis #java #reduction #string
- Analysis and reduction of memory inefficiencies in Java strings (KK, KO, TO), pp. 385–402.
- AdaEurope-2008-UruenaPLZP #approach #clustering
- A New Approach to Memory Partitioning in On-Board Spacecraft Software (SU, JAP, JL, JZ, JAdlP), pp. 1–14.
- PLDI-2008-BoehmA #c++ #concurrent
- Foundations of the C++ concurrency memory model (HJB, SVA), pp. 68–78.
- PLDI-2008-WangXLGWZ #analysis #correlation
- Conditional correlation analysis for safe region-based memory management (XW, ZX, XL, ZG, XW, ZZ), pp. 45–55.
- PLDI-2008-WegielK #communication #coordination #named #type safety
- XMem: type-safe, transparent, shared memory for cross-runtime communication and coordination (MW, CK), pp. 327–338.
- POPL-2008-AbadiBHI #automation #semantics #transaction
- Semantics of transactional memory and automatic mutual exclusion (MA, AB, TH, MI), pp. 63–74.
- PPDP-2008-MontenegroPS #correctness #proving #type system
- A type system for safe memory management and its proof of correctness (MM, RP, CS), pp. 152–162.
- ASE-2008-KimKK #model checking #satisfiability #testing
- Unit Testing of Flash Memory Device Driver through a SAT-Based Model Checker (MK, YK, HK), pp. 198–207.
- FSE-2008-KulturTB #estimation #named #network #using
- ENNA: software effort estimation using ensemble of neural networks with associative memory (YK, BT, ABB), pp. 330–338.
- ICSE-2008-XuR #detection #java #precise #profiling #using
- Precise memory leak detection for java software using container profiling (G(X, AR), pp. 151–160.
- SAC-2008-AtoofianB #behaviour #embedded #latency
- Exploiting program cyclic behavior to reduce memory latency in embedded processors (EA, AB), pp. 1482–1486.
- SAC-2008-FilhoPRA #mobile #visualisation
- A strategy for memory traffic management of bitmap fonts for text visualization in mobile devices (JBFF, HSP, RR, RMCA), pp. 449–450.
- SAC-2008-GuoLPHCDW #design #manycore
- Hierarchical memory system design for a heterogeneous multi-core processor (JG, McL, ZP, LH, FC, KD, ZW), pp. 1504–1508.
- SAC-2008-ParkLLP #architecture #file system #hybrid #named #ram #scalability
- PFFS: a scalable flash memory file system for the hybrid architecture of phase-change RAM and NAND flash (YP, SHL, CL, KHP), pp. 1498–1503.
- SAC-2008-WeiYLX #embedded #predict #realtime
- Flash memory management based on predicted data expiry-time in embedded real-time systems (PW, LY, ZL, XX), pp. 1477–1481.
- SAC-2008-XiangYLW #implementation #reliability
- A reliable B-tree implementation over flash memory (XX, LY, ZL, PW), pp. 1487–1491.
- ASPLOS-2008-WegielK #concurrent #parallel
- The mapping collector: virtual memory support for generational, parallel, and concurrent compaction (MW, CK), pp. 91–102.
- DAC-2008-BaertGB #automation #case study
- An automatic scratch pad memory management tool and MPEG-4 encoder case study (RB, EdG, EB), pp. 201–204.
- DAC-2008-BrockmanLKKM #array #design #multi #programmable #using
- Design of a mask-programmable memory/multiplier array using G4-FET technology (JBB, SL, PMK, AK, MMM), pp. 337–338.
- DAC-2008-DongWSXLC #3d #architecture #evaluation #ram
- Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement (XD, XW, GS, YX, HHL, YC), pp. 554–559.
- DAC-2008-HsuW #algorithm #network #power management
- A generalized network flow based algorithm for power-aware FPGA memory mapping (TYH, TCW), pp. 30–33.
- DAC-2008-KwonYHMCE #approach #parallel
- A practical approach of memory access parallelization to exploit multiple off-chip DDR memories (WCK, SY, SMH, BM, KMC, SKE), pp. 447–452.
- DAC-2008-LiASR #array #design #modelling #probability #random #statistics
- Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement (JL, CA, SSS, KR), pp. 278–283.
- DAC-2008-PaulB #configuration management #performance #resource management #using
- Reconfigurable computing using content addressable memory for improved performance and resource usage (SP, SB), pp. 786–791.
- DATE-2008-CopeCL #configuration management #gpu #logic #using
- Using Reconfigurable Logic to Optimise GPU Memory Accesses (BC, PYKC, WL), pp. 44–49.
- DATE-2008-EdwardsVT #compilation #concurrent #message passing #multi #programming #thread
- Programming Shared Memory Multiprocessors with Deterministic Message-Passing Concurrency: Compiling SHIM to Pthreads (SAE, NV, OT), pp. 1498–1503.
- DATE-2008-MassasP #comparison #manycore #policy
- Comparison of memory write policies for NoC based Multicore Cache Coherent Systems (PGdM, FP), pp. 997–1002.
- DATE-2008-Pamunuwa #integration #scalability
- Memory Technology for Extended Large-Scale Integration in Future Electronics Applications (DP), pp. 1126–1127.
- DATE-2008-PandeyD #architecture #optimisation
- Slack Allocation Based Co-Synthesis and Optimization of Bus and Memory Architectures for MPSoCs (SP, RD), pp. 206–211.
- DATE-2008-VitkovskiKG #parallel
- Memory Organization with Multi-Pattern Parallel Accesses (AV, GK, GG), pp. 1420–1425.
- DATE-2008-XueSSQ #clustering #constraints #effectiveness #scheduling
- Effective Loop Partitioning and Scheduling under Memory and Register Dual Constraints (CJX, EHMS, ZS, MQ), pp. 1202–1207.
- HPCA-2008-ChenMP #constraints #graph #runtime #using #validation
- Runtime validation of memory ordering using constraint graph checking (KC, SM, PP), pp. 415–426.
- HPCA-2008-ChungDKK #thread #transaction #using
- Thread-safe dynamic binary translation using transactional memory (JC, MD, HK, CK), pp. 279–289.
- HPCA-2008-RogersYCPS #distributed #multi
- Single-level integrity and confidentiality protection for distributed shared memory multiprocessors (BR, CY, SC, MP, YS), pp. 161–172.
- HPCA-2008-SubramaniamPL #dependence #named #predict #smt
- PEEP: Exploiting predictability of memory dependences in SMT processors (SS, MP, GHL), pp. 137–148.
- HPDC-2008-YouseffSYDW #algebra #kernel #linear
- The impact of paravirtualized memory hierarchy on linear algebra computational kernels and software (LY, KS, HY, JD, RW), pp. 141–152.
- ISMM-2008-BrabermanFGY #parametricity #predict #requirements
- Parametric prediction of heap memory requirements (VAB, FJF, DG, SY), pp. 141–150.
- ISMM-2008-ChinNPQ #bound #low level #source code
- Analysing memory resource bounds for low-level programs (WNC, HHN, CP, SQ), pp. 151–160.
- ISMM-2008-HammerA #self
- Memory management for self-adjusting computation (MAH, UAA), pp. 51–60.
- ISMM-2008-JungY #detection #summary
- Practical memory leak detector based on parameterized procedural summaries (YJ, KY), pp. 131–140.
- ISMM-2008-McIlroyDS #performance
- Efficient dynamic heap allocation of scratch-pad memory (RM, PD, JS), pp. 31–40.
- ISMM-2008-PhanSJ #runtime
- Runtime support for region-based memory management in Mercury (QP, ZS, GJ), pp. 61–70.
- OSDI-2008-GuptaLVSSVVV #difference #virtual machine
- Difference Engine: Harnessing Memory Redundancy in Virtual Machines (DG, SL, MV, SS, ACS, GV, GMV, AV), pp. 309–322.
- OSDI-2008-ZeldovichKDK #hardware #policy #security #using
- Hardware Enforcement of Application Security Policies Using Tagged Memory (NZ, HK, MD, CK), pp. 225–240.
- PDP-2008-GilSC #transaction
- Characterization of Conflicts in Log-Based Transactional Memory (LogTM) (JRTG, MEA, JMGC), pp. 30–37.
- PPoPP-2008-AgrawalFS #parallel #transaction
- Nested parallelism in transactional memory (KA, JTF, JS), pp. 163–174.
- PPoPP-2008-AnsariKJLKW #adaptation #algorithm #case study #concurrent #experience #transaction #using
- Experiences using adaptive concurrency in transactional memory with Lee’s routing algorithm (MA, CK, KJ, ML, CCK, IW), pp. 261–262.
- PPoPP-2008-BocchinoAC #clustering #scalability #transaction
- Software transactional memory for large scale clusters (RLBJ, VSA, BLC), pp. 247–258.
- PPoPP-2008-BrevnovDKYSCMS #case study #experience #java #transaction
- Practical experiences with Java software transactional memory (EB, YD, BK, DY, VS, DyC, VM, SS), pp. 287–288.
- PPoPP-2008-FelberFR #performance #transaction
- Dynamic performance tuning of word-based software transactional memory (PF, CF, TR), pp. 237–246.
- PPoPP-2008-GuerraouiK #correctness #on the #transaction
- On the correctness of transactional memory (RG, MK), pp. 175–184.
- PPoPP-2008-HoustonPRKFADH #interface #multi #runtime
- A portable runtime interface for multi-level memory hierarchies (MH, JYP, MR, TJK, KF, AA, WJD, PH), pp. 143–152.
- PPoPP-2008-LevM #hardware #transaction #using
- Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory (YL, JWM), pp. 197–206.
- PPoPP-2008-MaratheM #performance #towards #transaction
- Toward high performance nonblocking software transactional memory (VJM, MM), pp. 227–236.
- PPoPP-2008-McGacheyAHMSS #concurrent #garbage collection #transaction
- Concurrent GC leveraging transactional memory (PM, ARAT, RLH, VM, BS, TS), pp. 217–226.
- PPoPP-2008-SandersK #modelling #reasoning
- Assertional reasoning about data races in relaxed memory models (BAS, KK), pp. 267–268.
- PPoPP-2008-TanFZRG #architecture #experience #manycore #optimisation
- Experience on optimizing irregular computation for memory hierarchy in manycore architecture (GT, DF, JZ, AR, GRG), pp. 279–280.
- PPoPP-2008-TatikondaP #adaptation #approach #architecture #manycore #mining
- An adaptive memory conscious approach for mining frequent trees: implications for multi-core architectures (ST, SP), pp. 263–264.
- CAV-2008-AbdullaBCHR #abstraction #source code
- Monotonic Abstraction for Programs with Dynamic Memory Heaps (PAA, AB, JC, FH, AR), pp. 341–354.
- CAV-2008-BaswanaMP #consistency #set #verification
- Implied Set Closure and Its Application to Memory Consistency Verification (SB, SKM, VP), pp. 94–106.
- CAV-2008-BurckhardtM #effectiveness #modelling #verification
- Effective Program Verification for Relaxed Memory Models (SB, MM), pp. 107–120.
- CAV-2008-CohenPZ #transaction #verification
- Mechanical Verification of Transactional Memories with Non-transactional Memory Accesses (AC, AP, LDZ), pp. 121–134.
- TAP-2008-Ferrara #abstract interpretation #static analysis
- Static Analysis Via Abstract Interpretation of the Happens-Before Memory Model (PF), pp. 116–133.
- DocEng-2007-ConcolatoFM #documentation
- Timed-fragmentation of SVG documents to control the playback memory usage (CC, JLF, JCM), pp. 121–124.
- ECDL-2007-JochumKSW #image #library
- Living Memory Annotation Tool — Image Annotations for Digital Libraries (WJ, MK, KS, FW), pp. 549–550.
- VLDB-2007-SchollBGKWRK #data transformation #in memory #named
- HiSbase: Histogram-based P2P Main Memory Data Management (TS, BB, BG, RK, DW, AR, AK), pp. 1394–1397.
- CIAA-2007-HoltmannL #game studies #infinity #reduction
- Memory Reduction for Strategies in Infinite Games (MH, CL), pp. 253–264.
- ILC-2007-Jones
- Dynamic memory management (RJ), p. 2.
- AIIDE-2007-ForbusK
- Episodic Memory: A Final Frontier (Abbreviated Version) (KDF, SEK), pp. 80–83.
- CHI-2007-BrushMTC #comprehension
- Understanding memory triggers for task tracking (AJBB, BM, DST, MC), pp. 947–950.
- CHI-2007-KalnikaiteW #people #why
- Software or wetware?: discovering when and why people use digital prosthetic memory (VK, SW), pp. 71–80.
- CHI-2007-SellenFAHRW #case study #using
- Do life-logging technologies support memory for the past?: an experimental study using sensecam (AS, AF, MA, SH, CR, KRW), pp. 81–90.
- HCI-AS-2007-KuboKTCWY #design #interactive #product line
- Interactive Design of Memory Sharing Applications for Families (MK, AK, ET, RC, KW, MY), pp. 954–960.
- HCI-IDU-2007-TranMC #independence #using
- Using Memory Aid to Build Memory Independence (QTT, EDM, GC), pp. 959–965.
- HIMI-IIE-2007-HashimotoN #community #using
- Fond Memory Management System by Using Information About Communities (KH, YN), pp. 23–29.
- HIMI-IIE-2007-IkeiOK #interface
- Spatial Electronic Mnemonics: A Virtual Memory Interface (YI, HO, TK), pp. 30–37.
- HIMI-IIE-2007-WangCH #using
- Using Long Term Memory for Bookmark Management (MJW, KMC, TKH), pp. 812–820.
- VISSOFT-2007-MoretaT #visualisation
- Visualizing Dynamic Memory Allocations (SM, ACT), pp. 31–38.
- ICEIS-HCI-2007-MelguizoBDBB #recommendation #what
- What a Proactive Recommendation System Needs — Relevance, Non-Intrusiveness, and a New Long-Term Memory (MCPM, TB, AD, LB, AvdB), pp. 86–91.
- MLDM-2007-PalancarTCL #algorithm #distributed #mining #parallel
- Distributed and Shared Memory Algorithm for Parallel Mining of Association Rules (JHP, OFT, JFC, RHL), pp. 349–363.
- SIGIR-2007-StrohmanC #documentation #in memory #performance #retrieval
- Efficient document retrieval in main memory (TS, WBC), pp. 175–182.
- OOPSLA-2007-Grossman #garbage collection #transaction
- The transactional memory / garbage collection analogy (DG), pp. 695–706.
- PLDI-2007-BurckhardtAM #concurrent #consistency #data type #modelling #named
- CheckFence: checking consistency of concurrent data types on relaxed memory models (SB, RA, MMKM), pp. 12–21.
- PLDI-2007-CheremPR #analysis #detection #using
- Practical memory leak detection using guarded value-flow analysis (SC, LP, RR), pp. 480–491.
- PLDI-2007-NovarkBZ #automation #fault #named #probability
- Exterminator: automatically correcting memory errors with high probability (GN, EDB, BGZ), pp. 1–11.
- POPL-2007-JumpM #detection #garbage collection #named
- Cork: dynamic memory leak detection for garbage-collected languages (MJ, KSM), pp. 31–38.
- ASE-2007-ClauseDOP #effectiveness #using
- Effective memory protection using dynamic tainting (JAC, ID, AO, MP), pp. 284–292.
- ASE-2007-RaysideM #profiling
- Object ownership profiling: a technique for finding and fixing memory leaks (DR, LM), pp. 194–203.
- SAC-2007-BraynerM #energy
- Balancing energy consumption and memory usage in sensor data processing (AB, RM), pp. 935–939.
- SAC-2007-GramoliAV #configuration management #named #scalability
- SQUARE: scalable quorum-based atomic memory with local reconfiguration (VG, EA, AV), pp. 574–579.
- SAC-2007-Hamid #runtime
- Integrating a certified memory management runtime with proof-carrying code (NAH), pp. 1526–1533.
- SAC-2007-HiserDW #design #embedded #performance
- Fast, accurate design space exploration of embedded systems memory configurations (JH, JWD, DBW), pp. 699–706.
- SAC-2007-MinYCH #operating system #performance
- An efficient dynamic memory allocator for sensor operating systems (HM, SY, YC, JH), pp. 1159–1164.
- CC-2007-ShyamG #architecture #array #energy #reduction
- An Array Allocation Scheme for Energy Reduction in Partitioned Memory Architectures (KS, RG), pp. 32–47.
- CGO-2007-DiceS #comprehension #trade-off #transaction
- Understanding Tradeoffs in Software Transactional Memory (DD, NS), pp. 21–33.
- CGO-2007-WangCWSA #code generation #optimisation #transaction
- Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language (CW, WYC, YW, BS, ARAT), pp. 34–48.
- CGO-2007-ZhaoRARW #ubiquitous
- Ubiquitous Memory Introspection (QZ, RMR, SPA, LR, WFW), pp. 299–311.
- DAC-2007-JooCSC #energy #multi
- Energy-Aware Data Compression for Multi-Level Cell (MLC) Flash Memory (YJ, YC, DS, NC), pp. 716–719.
- DAC-2007-KocKEO #embedded #multi #using
- Reducing Off-Chip Memory Access Costs Using Data Recomputation in Embedded Chip Multi-processors (HK, MTK, EE, ÖÖ), pp. 224–229.
- DAC-2007-KoelblBP #equivalence #modelling
- Memory Modeling in ESL-RTL Equivalence Checking (AK, JRB, CP), pp. 205–209.
- DAC-2007-KumarSCKS #embedded
- A System For Coarse Grained Memory Protection In Tiny Embedded Processors (RK, AS, AC, EK, MBS), pp. 218–223.
- DATE-2007-ChoudhuryRRM #interactive
- Interactive presentation: Single-ended coding techniques for off-chip interconnects to commodity memory (MRC, KR, SR, KM), pp. 1072–1077.
- DATE-2007-GeWL #configuration management #embedded #named #power management
- DRIM: a low power dynamically reconfigurable instruction memory hierarchy for embedded systems (ZG, WFW, HBL), pp. 1343–1348.
- DATE-2007-GrossschadlTRHM #constraints #energy #evaluation #implementation
- Energy evaluation of software implementations of block ciphers under memory constraints (JG, ST, CR, MH, MM), pp. 1110–1115.
- DATE-2007-HuVKCP #dependence #estimation #performance
- Fast memory footprint estimation based on maximal dependency vector calculation (QH, AV, PGK, FC, MP), pp. 379–384.
- DATE-2007-KandemirYSO #scheduling
- Memory bank aware dynamic loop scheduling (MTK, TY, SWS, ÖÖ), pp. 1671–1676.
- DATE-2007-MedardoniRBBSP #communication #in memory #industrial #interactive #platform
- Interactive presentation: Capturing the interaction of the communication, memory and I/O subsystems in memory-centric industrial MPSoC platforms (SM, MR, DB, LB, GS, CP), pp. 660–665.
- DATE-2007-MilidonisAPMKG #architecture #interactive
- Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy (AM, NA, VP, HM, AK, CEG), pp. 612–617.
- DATE-2007-NjorogeCWTGKO #multi #named #transaction
- ATLAS: a chip-multiprocessor with transactional memory support (NN, JC, SW, YT, DG, CK, KO), pp. 3–8.
- DATE-2007-ParkPH #novel #stack
- A novel technique to use scratch-pad memory for stack management (SP, HwP, SH), pp. 1478–1483.
- DATE-2007-SpangSW
- A sophisticated memory test engine for LCD display drivers (OS, HMvS, MGW), pp. 213–218.
- DATE-2007-ZhuLB #multi
- Mapping multi-dimensional signals into hierarchical memory organizations (HZ, IIL, FB), pp. 385–390.
- HPCA-2007-ChafiCCMMBKO #approach #scalability #transaction
- A Scalable, Non-blocking Approach to Transactional Memory (HC, JC, BDC, AM, CCM, WB, CK, KO), pp. 97–108.
- HPCA-2007-GaneshJWJ #architecture #comprehension #scalability
- Fully-Buffered DIMM Memory Architectures: Understanding Mechanisms, Overheads and Scaling (BG, AJ, DW, BLJ), pp. 109–120.
- HPCA-2007-KatayamaO
- Optical Interconnect Opportunities for Future Server Memory Systems (YK, AO), pp. 46–50.
- HPCA-2007-VenkataramaniRSP #debugging #monitoring #named #performance #programmable
- MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging (GV, BR, YS, MP), pp. 273–284.
- HPCA-2007-YenBMMVHSW #hardware #named #transaction
- LogTM-SE: Decoupling Hardware Transactional Memory from Caches (LY, JB, MRM, KEM, HV, MDH, MMS, DAW), pp. 261–272.
- HPDC-2007-RidruejoMN #component #concept #distributed #parallel #simulation
- Concepts and components of full-system simulation of distributed memory parallel computers (FJRP, JMA, JN), pp. 225–226.
- HPDC-2007-SongMD #concurrent #scheduling #thread
- Feedback-directed thread scheduling with memory considerations (FS, SM, JD), pp. 97–106.
- ISMM-2007-AzimiSSWB #named
- Path: page access tracking to improve memory management (RA, LS, MS, TW, ADB), pp. 31–42.
- ISMM-2007-GayEB
- Safe manual memory management (DG, RE, EAB), pp. 2–14.
- ISMM-2007-NguyenR #detection #using
- Detecting and eliminating memory leaks using cyclic memory allocation (HHN, MCR), pp. 15–30.
- LCTES-2007-ChoELS
- Dynamic data scratchpad memory management for a memory subsystem with an MMU (HC, BE, JL, HS), pp. 195–206.
- LCTES-2007-InSK #named
- SWL: a search-while-load demand paging scheme with NAND flash memory (JI, IS, HK), pp. 217–226.
- LCTES-2007-NingK #embedded #multi
- External memory page remapping for embedded multimedia systems (KN, DRK), pp. 185–194.
- PDP-2007-ChongHF #java #using
- Pretenuring in Java by Object Lifetime and Reference Density Using Scratch-Pad Memory (KFC, CYH, ASF), pp. 205–212.
- PPoPP-2007-KnightPRHEFADH #compilation
- Compilation for explicitly managed memory hierarchies (TJK, JYP, MR, MH, ME, KF, AA, WJD, PH), pp. 226–236.
- PPoPP-2007-MaratheM #performance #transaction
- Efficient nonblocking software transactional memory (VJM, MM), pp. 136–137.
- PPoPP-2007-NiMAHHMSS #transaction
- Open nesting in software transactional memory (YN, VM, ARAT, ALH, RLH, JEBM, BS, TS), pp. 68–78.
- PPoPP-2007-SaraswatJMP #formal method #modelling
- A theory of memory models (VAS, RJ, MMM, CvP), pp. 161–172.
- PPoPP-2007-SpearSHDS #communication #multi #named
- Alert-on-update: a communication aid for shared memory multiprocessors (MFS, AS, HH, SD, MLS), pp. 132–133.
- SOSP-2007-ChunMSK #word
- Attested append-only memory: making adversaries stick to their word (BGC, PM, SS, JK), pp. 189–204.
- SOSP-2007-RossbachHPRAW #hardware #named #operating system #transaction #using
- TxLinux: using and managing hardware transactional memory in an operating system (CJR, OSH, DEP, HER, BA, EW), pp. 87–102.
- ESOP-2007-CenciarelliKS #axiom #java
- The Java Memory Model: Operationally, Denotationally, Axiomatically (PC, AK, ES), pp. 331–346.
- FoSSaCS-2007-Comon-LundhJP #automaton #constraints
- Tree Automata with Memory, Visibility and Structural Constraints (HCL, FJ, NP), pp. 168–182.
- CBSE-2006-UfimtsevKM #performance
- Impact of Virtual Memory Managers on Performance of J2EE Applications (AU, AK, LM), pp. 285–293.
- SIGMOD-2006-LiuZR #query #runtime
- Run-time operator state spilling for memory intensive long-running queries (BL, YZ, EAR), pp. 347–358.
- VLDB-2006-Kim #in memory #roadmap
- Advances in Memory Technology (CK), p. 1105.
- VLDB-2006-KimBLLJ #embedded #named
- LGeDBMS: A Small DBMS for Embedded System with Flash Memory (GJK, SCB, HSL, HDL, MJJ), pp. 1255–1258.
- VLDB-2006-StormGLDS #adaptation #self
- Adaptive Self-tuning Memory in DB2 (AJS, CGA, SL, YD, MS), pp. 1081–1092.
- ICALP-v1-2006-FinocchiGI #fault #sorting
- Optimal Resilient Sorting and Searching in the Presence of Memory Faults (IF, FG, GFI), pp. 286–298.
- FM-2006-HuynhR #c#
- A Memory Model Sensitive Checker for C# (TQH, AR), pp. 476–491.
- Haskell-2006-DiatchkiJ #data type #functional #programming
- Strongly typed memory areas programming systems-level data structures in a functional language (ISD, MPJ), pp. 72–83.
- ECIR-2006-ChenOT #image #using
- Browsing Personal Images Using Episodic Memory (Time + Location) (CC, MPO, JT), pp. 362–372.
- ICPR-v1-2006-Morita #3d #image
- Three Dimensional Short-term Memory Image (SM), pp. 1226–1230.
- ICPR-v3-2006-ZhangLG #kernel #recognition
- Face Recognition by Combining Kernel Associative Memory and Gabor Transforms (BZ, CL, YG), pp. 465–468.
- OOPSLA-2006-HerlihyLM #flexibility #framework #implementation #transaction
- A flexible framework for implementing software transactional memory (MH, VL, MM), pp. 253–262.
- PLDI-2006-Adl-TabatabaiLMMSS #compilation #performance #runtime #transaction
- Compiler and runtime support for efficient software transactional memory (ARAT, BTL, VM, BRM, BS, TS), pp. 26–37.
- PLDI-2006-BartonCAZFCA #programming #scalability
- Shared memory programming for large scale machines (CB, CC, GA, YZ, MF, SC, JNA), pp. 108–117.
- PLDI-2006-BergerZ #named #probability #safety
- DieHard: probabilistic memory safety for unsafe languages (EDB, BGZ), pp. 158–168.
- PLDI-2006-HarrisPST #optimisation #transaction
- Optimizing memory transactions (TLH, MP, AS, DT), pp. 14–25.
- SAS-2006-OrlovichR #analysis
- Memory Leak Analysis by Contradiction (MO, RR), pp. 405–424.
- SAC-2006-Miyazaki #array #database #in memory
- A memory subsystem with comparator arrays for main memory database operations (JM), pp. 511–512.
- SAC-2006-WuKC #file system #performance
- Efficient initialization and crash recovery for log-based file systems over flash memory (CHW, TWK, LPC), pp. 896–900.
- ASPLOS-2006-BondM #detection #encoding #named #online
- Bell: bit-encoding online memory leak detection (MDB, KSM), pp. 61–72.
- ASPLOS-2006-ChuangNVSBPCC #bound #transaction
- Unbounded page-based transactional memory (WC, SN, GV, JS, MVB, GP, BC, OC), pp. 347–358.
- ASPLOS-2006-ChungMMSCCKO #trade-off #transaction
- Tradeoffs in transactional memory virtualization (JC, CCM, AM, TS, HC, BDC, CK, KO), pp. 371–381.
- ASPLOS-2006-DamronFLLMN #hybrid #transaction
- Hybrid transactional memory (PD, AF, YL, VL, MM, DN), pp. 336–346.
- ASPLOS-2006-MoravanBMYHLSW #transaction
- Supporting nested transactional memory in logTM (MJM, JB, KEM, LY, MDH, BL, MMS, DAW), pp. 359–370.
- ASPLOS-2006-NarayanasamyPC #dependence #using
- Recording shared memory dependencies using strata (SN, CP, BC), pp. 229–240.
- ASPLOS-2006-XuHB #reduction #transitive
- A regulated transitive reduction (RTR) for longer memory race recording (MX, MDH, RB), pp. 49–60.
- CC-2006-GuoWWBOVCA #ambiguity #runtime
- Selective Runtime Memory Disambiguation in a Dynamic Binary Translator (BG, YW, CW, MJB, GO, NV, JC, DIA), pp. 65–79.
- DAC-2006-HanGCJ #optimisation #video
- Buffer memory optimization for video codec application modeled in Simulink (SIH, XG, SIC, AAJ), pp. 689–694.
- DAC-2006-IsseninBDD #analysis #multi #reuse
- Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies (II, EB, BD, ND), pp. 49–52.
- DAC-2006-YangLD #operating system
- High-performance operating system controlled memory compression (LY, HL, RPD), pp. 701–704.
- DATE-2006-ChenOKK #array #data access
- Dynamic scratch-pad memory management for irregular array access patterns (GC, ÖÖ, MTK, MK), pp. 931–936.
- DATE-2006-DimondML #automation #resource management
- Automating processor customisation: optimised memory access and resource sharing (RGD, OM, WL), pp. 206–211.
- DATE-2006-KulkarniB #concurrent #framework #platform #thread
- Memory centric thread synchronization on platform FPGAs (CK, GJB), pp. 959–964.
- DATE-2006-MamagkakisAPCSM #automation #embedded
- Automated exploration of pareto-optimal configurations in parameterized dynamic memory allocation for embedded systems (SM, DA, CP, FC, DS, JMM), pp. 874–875.
- DATE-2006-NepalBMPZ #design #fault
- Designing MRF based error correcting circuits for memory elements (KN, RIB, JLM, WRP, AZ), pp. 792–793.
- DATE-2006-PasrichaD #architecture #communication #named
- COSMECA: application specific co-synthesis of memory and communication architectures for MPSoC (SP, NDD), pp. 700–705.
- DATE-2006-ShinKKH #embedded
- Restructuring field layouts for embedded memory systems (KS, JK, SK, HH), pp. 937–942.
- DATE-2006-ThornbergO #realtime #specification #video
- Impact of bit-width specification on the memory hierarchy for a real-time video processing system (BT, MO), pp. 752–753.
- DATE-2006-XueOLKK #architecture #clustering #embedded
- Dynamic partitioning of processing and memory resources in embedded MPSoC architectures (LX, ÖÖ, FL, MTK, IK), pp. 690–695.
- HPCA-2006-HuangGH #ambiguity
- Software-hardware cooperative memory disambiguation (RH, AG, MCH), pp. 244–253.
- HPCA-2006-ManovitH #consistency #verification
- Completely verifying memory consistency of test program executions (CM, SH), pp. 166–175.
- HPCA-2006-MooreBMHW #named #transaction
- LogTM: log-based transactional memory (KEM, JB, MJM, MDH, DAW), pp. 254–265.
- HPCA-2006-PandeyJZB #energy
- DMA-aware memory energy management (VP, WJ, YZ, RB), pp. 133–144.
- HPCA-2006-ShiFGLZY #architecture #in memory #named #security
- InfoShield: a security architecture for protecting information usage in memory (WS, JBF, GG, HHSL, YZ, JY), pp. 222–231.
- HPCA-2006-SubramaniamL #dependence #predict #scalability #scheduling
- Store vectors for scalable memory dependence prediction and scheduling (SS, GHL), pp. 65–76.
- HPDC-2006-YueMSN #adaptation #runtime
- Runtime Support for Memory Adaptation in Scientific Applications via Local Disk and Remote Memory (CY, RTM, AS, DSN), pp. 183–194.
- ISMM-2006-AgaramKLM #data type #performance
- Decomposing memory performance: data structures and phases (KKA, SWK, CL, KSM), pp. 95–103.
- ISMM-2006-CheadleFADHN #visualisation
- Visualising dynamic memory allocators (AMC, AJF, JWA, ND, RAH, JNP), pp. 115–125.
- ISMM-2006-HudsonSAH #named #scalability #transaction
- McRT-Malloc: a scalable transactional memory allocator (RLH, BS, ARAT, BH), pp. 74–83.
- ISMM-2006-Mendelson #challenge #power management
- Memory management challenges in the power-aware computing era (AM), pp. 1–2.
- ISMM-2006-SchneiderAN #parallel #scalability #thread
- Scalable locality-conscious multithreaded memory allocation (SS, CDA, DSN), pp. 84–94.
- ISMM-2006-ZhangKSDHO #adaptation
- Program-level adaptive memory management (CZ, KK, XS, CD, MH, MO), pp. 174–183.
- LCTES-2006-SpivakT #persistent #transaction
- Storing a persistent transactional object heap on flash memory (MS, ST), pp. 22–33.
- OSDI-2006-YangBKM #garbage collection #named
- CRAMM: Virtual Memory Support for Garbage-Collected Applications (TY, EDB, SFK, JEBM), pp. 103–116.
- PDP-2006-Chapman #parallel #programming #question #scalability
- Scalable Shared Memory Parallel Programming: Will One Size Fit All? (BMC), p. 3.
- PDP-2006-HartikainenLM #java #mobile #on the
- On Mobile Java Memory Consumption (VMH, PPL, TM), pp. 333–339.
- PPoPP-2006-KahanK #architecture #exclamation #parallel #quote #thread
- “MAMA!”: a memory allocator for multithreaded architectures (SK, PK), pp. 178–186.
- PPoPP-2006-KumarCHKN #hybrid #transaction
- Hybrid transactional memory (SK, MC, CJH, PK, ADN), pp. 209–220.
- PPoPP-2006-ManassievMA #clustering #concurrent #distributed #transaction
- Exploiting distributed version concurrency in a transactional memory cluster (KM, MM, CA), pp. 198–208.
- PPoPP-2006-SahaAHMH #manycore #named #performance #runtime #transaction
- McRT-STM: a high performance software transactional memory system for a multi-core runtime (BS, ARAT, RLH, CCM, BH), pp. 187–197.
- FASE-2006-RamanathanJG #alias
- Trace-Based Memory Aliasing Across Program Versions (MKR, SJ, AG), pp. 381–395.
- CAV-2006-BurckhardtAM #bound #case study #concurrent #data type #model checking #modelling
- Bounded Model Checking of Concurrent Data Types on Relaxed Memory Models: A Case Study (SB, RA, MMKM), pp. 489–502.
- CAV-2006-RoyZFH #consistency #performance #polynomial #verification
- Fast and Generalized Polynomial Time Memory Consistency Verification (AR, SZ, CJF, JCH), pp. 503–516.
- ICLP-2006-Phan #logic programming #programming language
- Static Memory Management for Logic Programming Languages (QP), pp. 465–466.
- ICLP-2006-PhanJ #source code #towards
- Towards Region-Based Memory Management for Mercury Programs (QP, GJ), pp. 433–435.
- ICLP-2006-SneyersSD #reuse
- Memory Reuse for CHR (JS, TS, BD), pp. 72–86.
- CBSE-2005-MeyerhoferV #enterprise #framework #java #named #profiling
- EJBMemProf — A Memory Profiling Framework for Enterprise JavaBeans (MM, BV), pp. 17–32.
- WICSA-2005-Rosso #architecture #embedded #product line #realtime
- Dynamic Memory Management for Software Product Family Architectures in Embedded Real-Time Systems (CDR), pp. 211–212.
- PODS-2005-GroheS #bound #random #sorting
- Lower bounds for sorting with few random accesses to external memory (MG, NS), pp. 238–249.
- ICALP-2005-GroheKS #bound #query #streaming
- Tight Lower Bounds for Query Processing on Streaming and External Memory Data (MG, CK, NS), pp. 1076–1088.
- FM-2005-CacheraJPS #analysis
- Certified Memory Usage Analysis (DC, TPJ, DP, GS), pp. 91–106.
- SEFM-2005-BarthePS #analysis #logic #precise #using
- Precise Analysis of Memory Consumption using Program Logics (GB, MP, GS), pp. 86–95.
- IFL-2005-HuchK #composition #concurrent #haskell #implementation #transaction
- A High-Level Implementation of Composable Memory Transactions in Concurrent Haskell (FH, FK), pp. 124–141.
- CIKM-2005-ChuangC #constraints
- Frequent pattern discovery with memory constraint (KTC, MSC), pp. 345–346.
- OOPSLA-2005-HertzB #garbage collection #performance
- Quantifying the performance of garbage collection vs. explicit memory management (MH, EDB), pp. 313–326.
- PADL-2005-LopesC
- Improving Memory Usage in the BEAM (RL, VSC), pp. 143–157.
- POPL-2005-MansonPA #java
- The Java memory model (JM, WP, SVA), pp. 378–391.
- SAS-2005-ChenKK #execution #reliability
- Memory Space Conscious Loop Iteration Duplication for Reliable Execution (GC, MTK, MK), pp. 52–69.
- SAS-2005-ChinNQR #object-oriented #source code #verification
- Memory Usage Verification for OO Programs (WNC, HHN, SQ, MCR), pp. 70–86.
- SIGAda-2005-SinghoffLNM #analysis #requirements #scheduling
- Scheduling and memory requirements analysis with AADL (FS, JL, LN, LM), pp. 1–10.
- ESEC-FSE-2005-XieA #detection
- Context- and path-sensitive memory leak detection (YX, AA), pp. 115–125.
- SAC-2005-YimKK #performance
- A fast start-up technique for flash memory based computing systems (KSY, JK, KK), pp. 843–849.
- CC-2005-SadeSS #c #optimisation #parallel #thread #using
- Optimizing C Multithreaded Memory Management Using Thread-Local Storage (YS, SS, RS), pp. 137–155.
- CGO-2005-ChenCH #empirical #modelling #multi
- Combining Models and Guided Empirical Search to Optimize for Multiple Levels of the Memory Hierarchy (CC, JC, MWH), pp. 111–122.
- DAC-2005-KimK #array #design #embedded #optimisation #scheduling
- Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design (JK, TK), pp. 105–110.
- DAC-2005-PetrovTO #embedded #energy
- Energy-effcient physically tagged caches for embedded processors with virtual memory (PP, DT, AO), pp. 17–22.
- DATE-2005-BurchardHC #realtime #streaming
- A Real-Time Streaming Memory Controller (AB, EHN, AC), pp. 20–25.
- DATE-2005-CaiL #power management
- Joint Power Management of Memory and Disk (LC, YHL), pp. 86–91.
- DATE-2005-ChenKK #approach #constraints #layout #network #optimisation
- A Constraint Network Based Approach to Memory Layout Optimization (GC, MTK, MK), pp. 1156–1161.
- DATE-2005-DasygenisBDCST #energy #performance
- A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck (MD, EB, BD, FC, DS, AT), pp. 946–947.
- DATE-2005-FrancescoAM #architecture #distributed #flexibility #hardware #message passing
- Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture (FP, AP, PM), pp. 736–741.
- DATE-2005-GanaiGA #embedded #modelling #performance #using #verification
- Verification of Embedded Memory Systems using Efficient Memory Modeling (MKG, AG, PA), pp. 1096–1101.
- DATE-2005-HanlaiMJ #control flow #graph #optimisation #performance #using
- Extended Control Flow Graph Based Performance Optimization Using Scratch-Pad Memory (PH, LM, JJ), pp. 828–829.
- DATE-2005-IsseninD #automation #generative #named #optimisation
- FORAY-GEN: Automatic Generation of Affine Functions for Memory Optimizations (II, NDD), pp. 808–813.
- DATE-2005-LoghiP #energy #performance #trade-off
- Exploring Energy/Performance Tradeoffs in Shared Memory MPSoCs: Snoop-Based Cache Coherence vs. Software Solutions (ML, MP), pp. 508–513.
- DATE-2005-MajhiAGLEB #evaluation #industrial #testing
- Memory Testing Under Different Stress Conditions: An Industrial Evaluation (AKM, MA, GG, ML, SE, FB), pp. 438–443.
- DATE-2005-MarinissenPKZ #challenge #design #embedded
- Challenges in Embedded Memory Design and Test (EJM, BP, DKS, YZ), pp. 722–727.
- DATE-2005-MolnosHCE #communication #composition #multi
- Compositional Memory Systems for Multimedia Communicating Tasks (AMM, MJMH, SDC, JTJvE), pp. 932–937.
- DATE-2005-OzturkK #energy
- Nonuniform Banking for Reducing Memory Energy Consumption (ÖÖ, MTK), pp. 814–819.
- DATE-2005-VillaSVMP #framework #integration #multi #performance
- Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip (OV, PS, IV, MM, GP), pp. 804–805.
- DATE-2005-WehmeyerM #embedded #predict
- nfluence of Memory Hierarchies on Predictability for Time Constrained Embedded Software (LW, PM), pp. 600–605.
- HPCA-2005-AnanianAKLL #bound #transaction
- Unbounded Transactional Memory (CSA, KA, BCK, CEL, SL), pp. 316–327.
- HPCA-2005-HallnorR
- A Unified Compressed Memory Hierarchy (EGH, SKR), pp. 201–212.
- HPCA-2005-JaleelJ #using
- Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions (AJ, BLJ), pp. 191–200.
- HPCA-2005-QinLZ #detection #named
- SafeMem: Exploiting ECC-Memory for Detecting Memory Leaks and Memory Corruption During Production Runs (FQ, SL, YZ), pp. 291–302.
- HPCA-2005-VenkatesanAR #power management
- Tapping ZettaRAMTM for Low-Power Memory Systems (RKV, ASAZ, ER), pp. 83–94.
- HPCA-2005-ZhangGYZG #multi #named #security #symmetry
- SENSS: Security Enhancement to Symmetric Shared Memory Multiprocessors (YZ, LG, JY, XZ, RG), pp. 352–362.
- HPCA-2005-ZhuZ #comparison #optimisation #performance #smt
- A Performance Comparison of DRAM Memory System Optimizations for SMT Processors (ZZ, ZZ), pp. 213–224.
- LCTES-2005-KandemirCK #compilation
- Compiling for memory emergency (MTK, GC, IK), pp. 213–221.
- PDP-2005-BeaumontLMR #independence #platform #scheduling
- Independent and Divisible Tasks Scheduling on Heterogeneous Star-shaped Platforms with Limited Memory (OB, AL, LM, YR), pp. 179–186.
- PDP-2005-KoukisK #clustering #scheduling
- Memory Bandwidth Aware Scheduling for SMP Cluster Nodes (EK, NK), pp. 187–196.
- PPoPP-2005-CollardJY #monitoring #optimisation #performance
- System-wide performance monitors and their application to the optimization of coherent memory accesses (JFC, NPJ, SY), pp. 247–254.
- PPoPP-2005-HarrisMPH #composition #transaction
- Composable memory transactions (TH, SM, SLPJ, MH), pp. 48–60.
- SOSP-2005-WitchelRA #linux #named #using
- Mondrix: memory isolation for linux using mondriaan memory protection (EW, JR, KA), pp. 31–44.
- FASE-2005-BeyerHJM #safety
- Checking Memory Safety with Blast (DB, TAH, RJ, RM), pp. 2–18.
- STOC-2005-ChlebusK
- Cooperative asynchronous update of shared memory (BSC, DRK), pp. 733–739.
- PODS-2004-Bar-YossefFJ #evaluation #on the #requirements #xml #xpath
- On the Memory Requirements of XPath Evaluation over XML Streams (ZBY, MF, VJ), pp. 177–188.
- VLDB-2004-ShaoSSAG #layout #named
- Clotho: Decoupling memory page layout from storage organization (MS, JS, SWS, AA, GRG), pp. 696–707.
- ICALP-2004-ArgeMT #algorithm #graph
- External Memory Algorithms for Diameter and All-Pairs Shortest-Paths on Sparse Graphs (LA, UM, LT), pp. 146–157.
- CHI-2004-RafflePI #assembly #named
- Topobo: a constructive assembly system with kinetic memory (HR, AJP, HI), pp. 647–654.
- ICEIS-v1-2004-FuZ #data type #scalability
- Memory Management for Large Scale Data Stream Recorders (KF, RZ), pp. 54–63.
- ICEIS-v2-2004-LokugeAD #fuzzy
- BDI Agents with Fuzzy Associative Memory for Vessel Berthing in Container Ports (PL, DA, PD), pp. 315–320.
- ICPR-v2-2004-HanheideBS #consistency #validation
- Memory Consistency Validation in a Cognitive Vision System (MH, CB, GS), pp. 459–462.
- ICPR-v3-2004-DePiero #bound #graph #polynomial #worst-case
- Structural Graph Matching With Polynomial Bounds On Memory and on Worst-Case Effort (FWD), pp. 379–382.
- PLDI-2004-Michael #scalability
- Scalable lock-free dynamic memory allocation (MMM), pp. 35–46.
- FSE-2004-XuDS #c #performance #safety #source code
- An efficient and backwards-compatible transformation to ensure memory safety of C programs (WX, DCD, RS), pp. 117–126.
- ICSE-2004-DolstraVJ #deployment
- Imposing a Memory Management Discipline on Software Deployment (ED, EV, MdJ), pp. 583–592.
- SAC-2004-Goethals #mining
- Memory issues in frequent itemset mining (BG), pp. 530–534.
- SAC-2004-KatsarosM #web
- Caching in Web memory hierarchies (DK, YM), pp. 1109–1113.
- SAC-2004-ParkKLK #architecture #embedded #energy #performance
- An energy efficient cache memory architecture for embedded systems (JWP, CGK, JHL, SDK), pp. 884–890.
- ASPLOS-2004-BronevetskyMPSS #source code
- Application-level checkpointing for shared memory programs (GB, DM, KP, PKS, MS), pp. 235–247.
- ASPLOS-2004-HauswirthC #adaptation #detection #profiling #statistics #using
- Low-overhead memory leak detection using adaptive statistical profiling (MH, TMC), pp. 156–164.
- ASPLOS-2004-LiLDZZAK #energy #in memory #performance
- Performance directed energy management for main memory and disks (XL, ZL, FMD, PZ, YZ, SVA, SK), pp. 271–283.
- ASPLOS-2004-ZhouPSRZK
- Dynamic tracking of page miss ratio curve for memory management (PZ, VP, JS, AR, YZ, SK), pp. 177–188.
- CC-2004-BalakrishnanR #bytecode
- Analyzing Memory Accesses in x86 Executables (GB, TWR), pp. 5–23.
- CC-2004-JohnsonM #multi #using
- Using Multiple Memory Access Instructions for Reducing Code Size (NJ, AM), pp. 265–280.
- CGO-2004-SoHZ #layout #parallel
- Custom Data Layout for Memory Parallelism (BS, MWH, HEZ), pp. 291–302.
- CGO-2004-WuPSRCA #profiling #using
- Exposing Memory Access Regularities Using Object-Relative Memory Profiling (QW, AP, AS, ER, DWC, DIA), pp. 315–324.
- DAC-2004-BiswasCAPID #set
- Introduction of local memory elements in instruction set extensions (PB, VC, KA, LP, PI, ND), pp. 729–734.
- DAC-2004-HanBBCJ #architecture #data transfer #distributed #flexibility #multi #performance #scalability
- An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory (SIH, AB, MB, SIC, AAJ), pp. 250–255.
- DAC-2004-LyuhK #energy #multi #scheduling
- Memory access scheduling and binding considering energy minimization in multi-bank memory systems (CGL, TK), pp. 81–86.
- DAC-2004-VuleticPI #configuration management
- Virtual memory window for application-specific reconfigurable coprocessors (MV, LP, PI), pp. 948–953.
- DATE-DF-2004-HollevoetDDCL
- A Power Optimized Display Memory Organization for Handheld User Terminal (LH, AD, KD, FC, FL), pp. 294–299.
- DATE-v1-2004-AtienzaMCMS #design #multi #network
- Dynamic Memory Management Design Methodology for Reduced Memory Footprint in Multimedia and Wireless Network Applications (DA, SM, FC, JMM, DS), pp. 532–537.
- DATE-v1-2004-BellatoBBCCPRRVZ
- Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA (MB, PB, DB, AC, MC, AP, MR, MSR, MV, PZ), pp. 584–589.
- DATE-v1-2004-BeniniIMM #design #metaprogramming
- Block-Enabled Memory Macros: Design Space Exploration and Application-Specific Tuning (LB, AI, AM, EM), pp. 698–699.
- DATE-v1-2004-BoseN #array #modelling
- Extraction of Schematic Array Models for Memory Circuits (SB, AN), pp. 570–577.
- DATE-v1-2004-IsseninBMD #analysis #reuse
- Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies (II, EB, MM, ND), pp. 202–207.
- DATE-v1-2004-Kandemir #data transformation #locality
- Impact of Data Transformations on Memory Bank Locality (MTK), pp. 506–511.
- DATE-v1-2004-MolnosHCE #composition #data-driven
- Compositional Memory Systems for Data Intensive Applications (AMM, MJMH, SC, JTJvE), pp. 728–729.
- DATE-v1-2004-PatelMP #architecture #energy #multi #synthesis
- Synthesis of Partitioned Shared Memory Architectures for Energy-Efficient Multi-Processor SoC (KP, EM, MP), pp. 700–701.
- DATE-v1-2004-SzymanekCK #architecture #design #energy #multi
- Time-Energy Design Space Exploration for Multi-Layer Memory Architectures (RS, FC, KK), pp. 318–323.
- DATE-v1-2004-VianaBRAA #design #modelling #platform #simulation
- Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology (PV, EB, SR, RA, GA), pp. 734–735.
- DATE-v1-2004-WangH #clustering #multi #power management #scheduling
- Power Aware Variable Partitioning and Instruction Scheduling for Multiple Memory Banks (ZW, XSH), pp. 312–317.
- DATE-v1-2004-ZhangV #using
- Using a Victim Buffer in an Application-Specific Memory Hierarchy (CZ, FV), pp. 220–227.
- DATE-v2-2004-Al-ArsG #fault #in memory #testing
- Soft Faults and the Importance of Stresses in Memory Testing (ZAA, AJvdG), pp. 1084–1091.
- DATE-v2-2004-KumarBK #algorithm #analysis #array #embedded #named #reduction #using
- MemMap: Technology Mapping Algorithm for Area Reduction in FPGAs with Embedded Memory Arrays Using Reconvergence Analysis (AMK, JB, VK), pp. 922–929.
- DATE-v2-2004-TiwariT #embedded #finite #state machine
- Saving Power by Mapping Finite-State Machines into Embedded Memory Blocks in FPGAs (AT, KAT), pp. 916–921.
- HPCA-2004-FernandezE
- Link-Time Path-Sensitive Memory Redundancy Elimination (MF, RE), pp. 300–310.
- HPCA-2004-LiuSK
- Organizing the Last Line of Defense before Hitting the Memory Wall for CMP (CL, AS, MTK), pp. 176–185.
- HPDC-2004-Aycock #ruby
- MPI Ruby with Remote Memory Access (CCA), pp. 280–281.
- ISMM-2004-LeeY #automation #effectiveness #source code
- Experiments on the effectiveness of an automatic insertion of memory reuses into ML-like programs (OL, KY), pp. 97–107.
- ISMM-2004-WickF
- Memory accounting without partitions (AW, MF), pp. 120–130.
- ISMM-2004-YangHBKM #automation
- Automatic heap sizing: taking real memory into account (TY, MH, EDB, SFK, JEBM), pp. 61–72.
- LCTES-2004-HiserD #algorithm #compilation #named #performance
- EMBARC: an efficient memory bank assignment algorithm for retargetable compilers (JH, JWD), pp. 182–191.
- PDP-2004-PichelHCR #locality #multi
- Improving the Locality of the Sparse Matrix-Vector Product on Shared Memory Multiprocessors (JCP, DBH, JCC, FFR), pp. 66–71.
- STOC-2004-FinocchiI #fault #sorting
- Sorting and searching in the presence of memory faults (without redundancy) (IF, GFI), pp. 101–110.
- CAV-2004-GopalakrishnanYS #execution #order #performance #verification
- QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings (GG, YY, HS), pp. 401–413.
- ICLP-2004-Schrijvers #generative #java #named #prolog
- JmmSolve: A Generative Java Memory Model Implemented in Prolog and CHR (TS), pp. 475–476.
- SIGMOD-2003-BabcockBDM #data type #scheduling
- Chain : Operator Scheduling for Memory Minimization in Data Stream Systems (BB, SB, MD, RM), pp. 253–264.
- SIGMOD-2003-CuiOTS #in memory #performance
- Contorting High Dimensional Data for Efficient Main Memory Processing (BC, BCO, JS, KLT), pp. 479–490.
- VLDB-2003-AnciauxBP #execution #query #requirements
- Memory Requirements for Query Execution in Highly Constrained Devices (NA, LB, PP), pp. 694–705.
- ICEIS-v1-2003-ChevalierJK #documentation #repository #towards
- Towards a Documentary Memory: Building a Document Repository for Companies (MC, CJ, KK), pp. 213–218.
- ECOOP-2003-MitchellS #automation #java #lightweight #named #scalability
- LeakBot: An Automated and Lightweight Tool for Diagnosing Memory Leaks in Large Java Applications (NM, GS), pp. 351–377.
- AdaEurope-2003-BriotGDCW #ada
- Exposing Memory Corruption and Finding Leaks: Advanced Mechanisms in Ada (EB, FG, RD, DC, PW), pp. 129–141.
- PLDI-2003-BoyapatiSBR #java #realtime
- Ownership types for safe region-based memory management in real-time Java (CB, AS, WSB, MCR), pp. 324–337.
- PLDI-2003-HeineL #c #c++ #detection
- A practical flow-sensitive and context-sensitive C and C++ memory leak detector (DLH, MSL), pp. 168–181.
- POPL-2003-PetersenHCP #layout #type system
- A type theory for memory allocation and data layout (LP, RH, KC, FP), pp. 172–184.
- SAS-2003-LeeYY #reuse #source code
- Inserting Safe Memory Reuse Commands into ML-Like Programs (OL, HY, KY), pp. 171–188.
- SAS-2003-ShahamYKS #safety
- Establishing Local Temporal Heap Safety Properties with Applications to Compile-Time Memory Management (RS, EY, EKK, SS), pp. 483–503.
- ESEC-FSE-2003-XieCE #analysis #detection #fault #named #using
- ARCHER: using symbolic, path-sensitive analysis to detect memory access errors (YX, AC, DRE), pp. 327–336.
- CGO-2003-BudiuG #optimisation
- Optimizing Memory Accesses For Spatial Computation (MB, SCG), pp. 216–227.
- CGO-2003-GibertSG #clustering #distributed #scheduling
- Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache (EG, FJS, AG), pp. 193–203.
- CGO-2003-MaratheMMSMY #metric #named
- METRIC: Tracking Down Inefficiencies in the Memory Hierarchy via Binary Rewriting (JM, FM, TM, BRdS, SAM, AY), pp. 289–300.
- DAC-2003-BorgattiCSFILMPPR #configuration management #embedded #multi
- A reconfigurable signal processing IC with embedded FPGA and multi-port flash memory (MB, LC, GDS, BF, DI, FL, GM, MP, MP, PLR), pp. 691–695.
- DAC-2003-ChoiK #design #embedded #layout #performance
- Memory layout techniques for variables utilizing efficient DRAM access modes in embedded system design (YC, TK), pp. 881–886.
- DAC-2003-KornarosPNZ #multi #optimisation #programmable #queue
- A fully-programmable memory management system optimizing queue handling at multi-gigabit rates (GK, IP, AN, NZ), pp. 54–59.
- DAC-2003-RamachandranJ #embedded #energy #named #performance
- Xtream-Fit: an energy-delay efficient data memory subsystem for embedded media processing (AR, MFJ), pp. 137–142.
- DATE-2003-BraunWSLMN #abstraction #multi
- Processor/Memory Co-Exploration on Multiple Abstraction Levels (GB, AW, OS, RL, HM, AN), pp. 10966–10973.
- DATE-2003-BrockmeyerMCC #energy #multi
- Layer Assignment echniques for Low Energy in Multi-Layered Memory Organisations (EB, MM, HC, FC), pp. 11070–11075.
- DATE-2003-MaciiMP #clustering #performance
- Improving the Efficiency of Memory Partitioning by Address Clustering (AM, EM, MP), pp. 10018–10023.
- DATE-2003-MamidipakaD #architecture #embedded #power management #stack
- On-chip Stack Based Memory Organization for Low Power Embedded Architectures (MM, NDD), pp. 11082–11089.
- DATE-2003-MarchalGPBBCC #energy #multi #platform
- SDRAM-Energy-Aware Memory Allocation for Dynamic Multi-Media Applications on Multi-Processor Platforms (PM, JIG, LP, DB, LB, FC, HC), pp. 10516–10523.
- DATE-2003-PetrovO #performance
- Power Efficiency through Application-Specific Instruction Memory Transformations (PP, AO), pp. 10030–10035.
- DATE-2003-Pirola #hardware
- A Solution for Hardware Emulation of Non Volatile Memory Macrocells (AP), pp. 20262–20267.
- DATE-2003-Sanchez-ElezFADBH #architecture #configuration management #data transformation #energy #multi
- Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures (MSE, MF, MLA, HD, NB, RH), pp. 10036–10043.
- HPCA-2003-ChristodoulopoulouAB #approach #clustering #fault tolerance #replication
- Dynamic Data Replication: An Approach to Providing Fault-Tolerant Shared Memory Clusters (RC, RA, AB), pp. 203–214.
- HPCA-2003-GarzaranPLVRT #concurrent #multi #thread #trade-off
- Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors (MJG, MP, JML, VV, LR, JT), pp. 191–202.
- HPCA-2003-GassendSCDD #performance #verification
- Caches and Hash Trees for Efficient Memory Integrity Verification (BG, GES, DEC, MvD, SD), pp. 295–306.
- HPCA-2003-KarlssonMHW #behaviour #middleware
- Memory System Behavior of Java-Based Middleware (MK, KEM, EH, DAW), pp. 217–228.
- LCTES-2003-DhurjatiKAL #garbage collection #runtime #safety
- Memory safety without runtime checks or garbage collection (DD, SK, VSA, CL), pp. 69–80.
- PDP-2003-Tao #evaluation #monitoring
- Supporting the Memory System Evaluation with a Monitor Simulator (JT), p. 31–?.
- PPoPP-2003-FraguelaRFPT #parallel #programming
- Programming the FlexRAM parallel intelligent memory system (BBF, JR, PF, DAP, JT), pp. 49–60.
- PPoPP-2003-FrensW #matrix #parallel
- Factorization with morton-ordered quadtree matrices for memory re-use and parallelism (JDF, DSW), pp. 144–154.
- PPoPP-2003-McCurdyF #multi #performance
- User-controllable coherence for high performance shared memory multiprocessors (CM, CNF), pp. 73–82.
- PPoPP-2003-TanSSAM #design pattern #distributed #generative #parallel #using
- Using generative design patterns to generate parallel code for a distributed memory environment (KT, DS, JS, JA, SM), pp. 203–215.
- PODS-2002-ArasuBBMW #data type #query #requirements
- Characterizing Memory Requirements for Queries over Continuous Data Streams (AA, BB, SB, JM, JW), pp. 221–232.
- PODS-2002-Ross #in memory
- Conjunctive Selection Conditions in Main Memory (KAR), pp. 109–120.
- VLDB-2002-DagevilleZ #sql
- SQL Memory Management in Oracle9i (BD, MZ), pp. 962–973.
- VLDB-2002-ManegoldBK #cost analysis #database #modelling
- Generic Database Cost Models for Hierarchical Memory Systems (SM, PAB, MLK), pp. 191–202.
- ICALP-2002-FantozziPP #integration #parallel
- Seamless Integration of Parallelism and Memory Hierarchy (CF, AP, GP), pp. 856–867.
- CHI-2002-CockburnM #2d #3d #effectiveness #physics
- Evaluating the effectiveness of spatial memory in 2D and 3D physical and virtual environments (AC, BJM), pp. 203–210.
- CAiSE-2002-LiuCD #rdf
- Exploring RDF for Expertise Matching within an Organizational Memory (PL, JC, PMD), pp. 100–116.
- ICML-2002-SlonimBFT #feature model #markov #multi
- Discriminative Feature Selection via Multiclass Variable Memory Markov Model (NS, GB, SF, NT), pp. 578–585.
- OOPSLA-2002-BergerZM
- Reconsidering custom memory allocation (EDB, BGZ, KSM), pp. 1–12.
- AdaEurope-2002-LobatoL
- OMC-INTEGRAL Memory Management (JMPL, EML), pp. 76–87.
- PLDI-2002-GrossmanMJHWC
- Region-Based Memory Management in Cyclone (DG, JGM, TJ, MWH, YW, JC), pp. 282–293.
- POPL-2002-ShufGBS #optimisation
- Exploiting prolific types for memory management and optimizations (YS, MG, RB, JPS), pp. 295–306.
- SAC-2002-MorvanH #execution #parallel #query
- Dynamic memory allocation strategies for parallel query execution (FM, AH), pp. 897–901.
- ASPLOS-2002-AshokCM #energy #named #performance
- Cool-Mem: combining statically speculative memory accessing with selective address translation for energy efficiency (RA, SC, CAM), pp. 133–143.
- ASPLOS-2002-WitchelCA
- Mondrian memory protection (EW, JC, KA), pp. 304–316.
- CC-2002-KandemirKK #energy #multi #optimisation
- Influence of Loop Optimizations on Energy Consumption of Multi-bank Memory Systems (MTK, IK, IK), pp. 276–292.
- DAC-2002-GharsalliMRJ #automation #embedded #generative #multi
- Automatic generation of embedded memory wrapper for multiprocessor SoC (FG, SM, FR, AAJ), pp. 596–601.
- DAC-2002-JooCSLKC #energy #reduction
- Energy exploration and reduction of SDRAM memory systems (YJ, YC, HS, HGL, KK, NC), pp. 892–897.
- DAC-2002-KandemirC #design
- Compiler-directed scratch pad memory hierarchy design and management (MTK, ANC), pp. 628–633.
- DAC-2002-KandemirRC #embedded #multi
- Exploiting shared scratch pad memory space in embedded multiprocessor systems (MTK, JR, ANC), pp. 219–224.
- DAC-2002-LuzKK #automation #energy #migration #multi
- Automatic data migration for reducing energy consumption in multi-bank memory systems (VDLL, MTK, IK), pp. 213–218.
- DAC-2002-LyseckyCV #performance #profiling
- A fast on-chip profiler memory (RLL, SC, FV), pp. 28–33.
- DAC-2002-SeoKP #algorithm #synthesis
- An integrated algorithm for memory allocation and assignment in high-level synthesis (JS, TK, PRP), pp. 608–611.
- DAC-2002-WhelihanS #network #optimisation
- Memory optimization in single chip network switch fabrics (DW, HS), pp. 530–535.
- DAC-2002-Ykman-CouvreurLVCNK #network #optimisation #performance
- System-level performance optimization of the data queueing memory management in high-speed network processors (CYC, JL, DV, FC, AN, GEK), pp. 518–523.
- DATE-2002-Al-ArsG #fault #in memory #modelling #testing
- Modeling Techniques and Tests for Partial Faults in Memory Devices (ZAA, AJvdG), pp. 89–93.
- DATE-2002-GrunDN
- Memory System Connectivity Exploration (PG, NDD, AN), pp. 894–901.
- DATE-2002-HettiaratchiCC #generative #trade-off
- Performance-Area Trade-Off of Address Generators for Address Decoder-Decoupled Memory (SH, PYKC, TJWC), pp. 902–908.
- DATE-2002-Ratford #design
- Make Your SoC Design a Winner: Select the Right Memory IP (VR), p. 15.
- HPCA-2002-JamiesonB #clustering #concurrent #named #thread
- CableS: Thread Control and Memory Management Extensions for Shared Virtual Memory Clusters (PJ, AB), pp. 263–274.
- HPCA-2002-SuhDR #clustering #monitoring #scheduling
- A New Memory Monitoring Scheme for Memory-Aware Scheduling and Partitioning (GES, SD, LR), pp. 117–128.
- HPCA-2002-WangWCGKS #execution
- Memory Latency-Tolerance Approaches for Itanium Processors: Out-of-Order Execution vs. Speculative Precomputation (PHW, HW, JDC, EG, RMK, JPS), pp. 187–196.
- HPCA-2002-ZhuZZ #multi #scheduling
- Fine-Grain Priority Scheduling on Multi-Channel Memory Systems (ZZ, ZZ, XZ), pp. 107–116.
- HPDC-2002-Plale #data type #runtime
- Leveraging Run Time Knowledge about Event Rates to Improve Memory Utilization in Wide Area Data Stream Filtering (BP), pp. 171–178.
- ISMM-2002-DetersC #automation #java #realtime
- Automated discovery of scoped memory regions for real-time Java (MD, RC), pp. 132–142.
- ISMM-2002-KumarL #programmable
- Dynamic memory management for programmable devices (SK, KL), pp. 245–255.
- ISMM-2002-Robertz
- Applying priorities to memory allocation (SGR), pp. 108–118.
- LCTES-SCOPES-2002-ChoPW #algorithm #architecture #graph #performance
- Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms (JC, YP, DBW), pp. 130–138.
- LCTES-SCOPES-2002-PalemRMKP #design #embedded #optimisation
- Design space optimization of embedded memory systems via data remapping (KVP, RMR, VJM, PK, KP), pp. 28–37.
- OSDI-2002-Waldspurger #resource management
- Memory Resource Management in VMware ESX Server (CAW), pp. 181–194.
- PDP-2002-JimenezFC #algorithm #consistency
- A Parametrized Algorithm that Implements Sequential, Causal, and Cache Memory Consistency (EJ, AF, VC), pp. 437–444.
- PDP-2002-PetitSP #parallel
- Characterizing Parallel Workloads to Reduce Multiple Writer Overhead in Shared Virtual Memory Systems (SP, JS, AP), pp. 261–268.
- PDP-2002-SeinstraK #layout #message passing #modelling #source code
- Incorporating Memory Layout in the Modeling of Message Passing Programs (FJS, DK), pp. 293–300.
- STOC-2002-Ajtai
- The invasiveness of off-line memory checking (MA), pp. 504–513.
- CAV-2002-ChatterjeeSG #consistency #model checking #modelling #protocol #refinement #verification
- Shared Memory Consistency Protocol Verification Against Weak Memory Models: Refinement via Model-Checking (PC, HS, GG), pp. 123–136.
- ICALP-2001-BilardiP #locality
- A Characterization of Temporal Locality and Its Portability across Memory Hierarchies (GB, EP), pp. 128–139.
- ICALP-2001-ComonCM #automaton #constraints #protocol #set
- Tree Automata with One Memory, Set Constraints, and Ping-Pong Protocols (HC, VC, JM), pp. 682–693.
- ICALP-2001-JurdzinskiK #communication #finite
- Communication Gap for Finite Memory Devices (TJ, MK), pp. 1052–1064.
- FME-2001-HartelBJL #smarttech
- Transacted Memory for Smart Cards (PHH, MJB, EdJ, ML), pp. 478–499.
- TLCA-2001-Hofmann #behaviour #bound #complexity #type system #using
- From Bounded Arithmetic to Memory Management: Use of Type Theory to Capture Complexity Classes and Space Behaviour (MH0), pp. 2–3.
- IFL-2001-Grelck #array #optimisation
- Optimizations on Array Skeletons in a Shared Memory Environment (CG), pp. 36–54.
- CHI-2001-Baldis #comprehension
- Effects of spatial audio on memory, comprehension, and preference during desktop conferences (JJB), pp. 166–173.
- SVIS-2001-ZimmermannZ #graph #visualisation
- Visualizing Memory Graphs (TZ, AZ), pp. 191–204.
- ICEIS-v1-2001-AbeckerBNMHHML #workflow
- The DECOR Toolbox for Workflow-Embedded Organizational Memory Access (AA, AB, SN, GM, RH, CH, SM, ML), pp. 225–232.
- CIKM-2001-XiaKCRB #concurrent #data access #database #in memory #version control
- Dynamic Versioning Concurrency Control for Index-Based Data Access in Main Memory Database Systems (YX, SHK, SKC, KWR, HYB), pp. 550–552.
- ICML-2001-GlickmanS #learning #policy #probability #search-based
- Evolutionary Search, Stochastic Policies with Memory, and Reinforcement Learning with Hidden State (MRG, KPS), pp. 194–201.
- ICML-2001-SeldinBT #markov #segmentation #sequence
- Unsupervised Sequence Segmentation by a Mixture of Switching Variable Memory Markov Sources (YS, GB, NT), pp. 513–520.
- SEKE-2001-WangenheimLW #approach #hybrid
- A Hybrid Approach for Corporate Memory Management Systems in Software R&D Organizations (CGvW, DL, AvW), pp. 326–330.
- PLDI-2001-BergerZM
- Composing High-Performance Memory Allocators (EDB, BGZ, KSM), pp. 114–124.
- PLDI-2001-GhiyaLS #ambiguity #analysis #c #on the #points-to #source code
- On the Importance of Points-to Analysis and Other Memory Disambiguation Methods for C Programs (RG, DML, DCS), pp. 47–58.
- PPDP-2001-HengleinMN #approach #control flow
- A Direct Approach to Control-Flow Sensitive Region-Based Memory Management (FH, HM, HN), pp. 175–186.
- SAC-2001-Menezes #experience
- Experience with memory management in open Linda systems (RM), pp. 187–196.
- DAC-2001-BeniniMMMP #architecture #embedded #layout #synthesis
- From Architecture to Layout: Partitioned Memory Synthesis for Embedded Systems-on-Chip (LB, LM, AM, EM, MP), pp. 784–789.
- DAC-2001-Gebotys #embedded
- Utilizing Memory Bandwidth in DSP Embedded Processors (CHG), pp. 347–352.
- DAC-2001-KandemirRIVKP
- Dynamic Management of Scratch-Pad Memory Space (MTK, JR, MJI, NV, IK, AP), pp. 690–695.
- DAC-2001-RamanujamHKN #embedded #requirements
- Reducing Memory Requirements of Nested Loops for Embedded Systems (JR, JH, MTK, AN), pp. 359–364.
- DATE-2001-Al-ArsG #array #behaviour #embedded
- Static and dynamic behavior of memory cell array opens and shorts in embedded DRAMs (ZAA, AJvdG), pp. 496–503.
- DATE-2001-GrunDN #embedded #power management
- Access pattern based local memory customization for low power embedded systems (PG, NDD, AN), pp. 778–784.
- DATE-2001-LiW #fault
- Memory fault diagnosis by syndrome compression (JFL, CWW), pp. 97–101.
- DATE-2001-OuaissV #configuration management #synthesis
- Hierarchical memory mapping during synthesis in FPGA-based reconfigurable computers (IO, RV), pp. 650–657.
- DATE-2001-SchmidtJKTN #automation #modelling
- Automatic nonlinear memory power modelling (ES, GJ, LK, FT, WN), p. 808.
- DATE-2001-Zhu01a #analysis #pointer
- Static memory allocation by pointer analysis and coloring (JZ), pp. 785–790.
- HPCA-2001-AbaliFSPS #hardware #in memory #performance
- Performance of Hardware Compressed Main Memory (BA, HF, XS, DEP, TBS), pp. 73–81.
- HPCA-2001-LeeST #architecture #automation
- Automatically Mapping Code on an Intelligent Memory Architecture (JL, YS, JT), pp. 121–132.
- HPCA-2001-LinRB #design
- Reducing DRAM Latencies with an Integrated Memory Hierarchy Design (WFL, SKR, DB), pp. 301–312.
- HPCA-2001-QiuD #towards
- Towards Virtually-Addressed Memory Hierarchies (XQ, MD), pp. 51–62.
- LCTES-OM-2001-UnnikrishnanSL #analysis #automation #garbage collection
- Automatic Accurate Live Memory Analysis for Garbage-Collected Languages (LU, SDS, YAL), pp. 102–111.
- PDP-2001-AllmannRR #distributed #reduction
- Cyclic Reduction on Distributed Shared Memory Machines (SA, TR, GR), pp. 290–297.
- PDP-2001-BaiardiGMMR #architecture #data type #distributed
- DVSA and SHOB: Support to Shared Data Structures on Distributed Memory Architectures (FB, DG, PM, LM, LR), pp. 165–172.
- PDP-2001-BernaschiR #communication #scalability
- MPI Collective Communication Operations on Large Shared Memory Systems (MB, GR), pp. 159–164.
- PDP-2001-GrosspietschB #architecture #performance
- A Smart Memory Architecture for the Efficient Support of Artificial Neural Nets (KEG, JB), p. 451–?.
- PDP-2001-SchmidtR #embedded #information retrieval #using
- Content-Based Information Retrieval Using an Embedded Neural Associative Memory (MS, UR), pp. 443–450.
- PPoPP-2001-LuCZ #distributed #replication #source code
- Contention elimination by replication of sequential sections in distributed shared memory programs (HL, ALC, WZ), pp. 53–61.
- PPoPP-2001-MorrisL #distributed #estimation
- Accurate data redistribution cost estimation in software distributed shared memory systems (DGM, DKL), pp. 62–71.
- PPoPP-2001-VeldemaHBJB #distributed #optimisation
- Source-level global optimizations for fine-grain distributed shared memory systems (RV, RFHH, RB, CJHJ, HEB), pp. 83–92.
- ICLP-2001-CastroC #comprehension #prolog
- Understanding Memory Management in Prolog Systems (LFC, VSC), pp. 11–26.
- SIGMOD-2000-RaoR #in memory
- Making B+-Trees Cache Conscious in Main Memory (JR, KAR), pp. 475–486.
- VLDB-2000-ManegoldBK #cpu #optimisation #what
- What Happens During a Join? Dissecting CPU and Memory Optimization Effects (SM, PAB, MLK), pp. 339–350.
- ICFP-2000-SerranoB #comprehension #source code
- Understanding memory allocation of scheme programs (MS, HJB), pp. 245–256.
- ICPR-v2-2000-CortadellasA #image
- Image Associative Memory (JC, JA), pp. 2638–2641.
- ICPR-v2-2000-WilsonH #capacity #correlation #exponential
- Storage Capacity of the Exponential Correlation Associative Memory (RCW, ERH), pp. 2660–2663.
- ICPR-v4-2000-Salas #mobile #visual notation
- Visual Memory Maps for Mobile Robots (JS), pp. 4681–4684.
- OOPSLA-2000-MaessenAS #java #using
- Improving the Java memory model using CRF (JWM, A, XS), pp. 1–12.
- TOOLS-EUROPE-2000-NobleW00a #design pattern
- Smaller Software: Patterns for Objects in Limited Memory (JN, CW), p. 471.
- PEPM-2000-ScholzBF #analysis #detection #pointer
- Symbolic Pointer Analysis for Detecting Memory Leaks (BS, JB, TF), pp. 104–113.
- PLDI-2000-LinP #analysis #compilation
- Compiler analysis of irregular memory accesses (YL, DAP), pp. 157–168.
- PLDI-2000-RuginaR #analysis #array #bound #pointer
- Symbolic bounds analysis of pointers, array indices, and accessed memory regions (RR, MCR), pp. 182–195.
- PLDI-2000-YiAK #multi #recursion
- Transforming loops to recursion for multi-level memory hierarchies (QY, VSA, KK), pp. 169–181.
- PPDP-2000-Li #performance #prolog #stack
- Efficient memory management in a merged heap/stack prolog machine (XL), pp. 245–256.
- SAC-2000-Ionescu #multi #realtime
- Application-Level Virtual Memory Management in Real-Time Multiprocessor Systems (FI), pp. 610–614.
- SAC-2000-ParkY #distributed #lightweight
- A Lightweight Casual Logging Scheme for Recoverable Distributed Shared Memory (TP, HYY), pp. 661–666.
- SAC-2000-YeoYP #consistency #distributed #protocol
- An Asynchronous Protocol for Release Consistent Distributed Shared Memory Systems (JHY, HYY, TP), pp. 716–721.
- ASPLOS-2000-BergerMBW #named #parallel #scalability #thread
- Hoard: A Scalable Memory Allocator for Multithreaded Applications (EDB, KSM, RDB, PRW), pp. 117–128.
- CC-2000-ShahamKS #array #automation #java
- Automatic Removal of Array Memory Leaks in Java (RS, EKK, SS), pp. 50–66.
- CC-2000-WangTP #framework
- A Framework for Loop Distribution on Limited On-Chip Memory Processors (LW, WT, SP), pp. 141–156.
- DAC-2000-ChangKC #encoding #power management
- Bus encoding for low-power high-performance memory systems (NC, KK, JC), pp. 800–805.
- DAC-2000-ChiouJRD #embedded #using
- Application-specific memory management for embedded systems using software-controlled caches (DC, PJ, LR, SD), pp. 416–419.
- DAC-2000-GrunDN #compilation
- Memory aware compilation through accurate timing extraction (PG, NDD, AN), pp. 316–321.
- DAC-2000-WangKS #clustering #latency #scheduling
- Optimal two level partitioning and loop scheduling for hiding memory latency for DSP applications (ZW, MK, EHMS), pp. 540–545.
- DATE-2000-CatthoorDK #architecture #compilation #data transfer #how #question
- How to Solve the Current Memory Access and Data Transfer Bottlenecks: At the Processor Architecture or at the Compiler Level? (FC, NDD, CEK), pp. 426–433.
- DATE-2000-ChangKK #architecture #video
- A Memory Architecture with 4-Address Configurations for Video Signal Processing (SC, JSK, LSK), p. 746.
- DATE-2000-HarmszeTM
- Memory Arbitration and Cache Management in Stream-Based Systems (FH, AHT, JLvM), pp. 257–262.
- DATE-2000-LuW #logic #modelling
- Cost and Benefit Models for Logic and Memory BIST (JML, CWW), pp. 710–714.
- DATE-2000-MurthyB #data flow #implementation #specification
- Shared Memory Implementations of Synchronous Dataflow Specifications (PKM, SSB), pp. 404–410.
- DATE-2000-SemeriaSM #behaviour #c #pointer #synthesis
- Resolution of Dynamic Memory Allocation and Pointers for the Behavioral Synthesis from C (LS, KS, GDM), pp. 312–319.
- HPCA-2000-ChiuehP #design #network
- Cache Memory Design for Network Processors (TcC, PP), pp. 409–418.
- HPCA-2000-MathewMCD #design #parallel
- Design of a Parallel Vector Access Unit for SDRAM Memory Systems (BKM, SAM, JBC, AD), pp. 39–48.
- HPCA-2000-MoshovosS #dependence #trade-off
- Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors (AM, GSS), pp. 301–312.
- HPCA-2000-MowryR #multi #thread #using
- Software-Controlled Multithreading Using Informing Memory Operations (TCM, SRR), pp. 121–132.
- HPCA-2000-StetsDKRS #network #order
- The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing (RS, SD, LIK, UR, MLS), pp. 265–276.
- HPDC-2000-XiaoZK #clustering #migration #network #ram
- Incorporating Job Migration and Network RAM to Share Cluster Memory Resources (LX, XZ, SAK), pp. 71–78.
- ISMM-2000-ChungM #lazy evaluation
- Memory Allocation with Lazy Fits (YCC, SMM), pp. 65–70.
- ISMM-2000-Makholm #prolog
- A Region-Based Memory Manager for Prolog (HM), pp. 25–34.
- ISMM-2000-Rodriguez-RiveraSF #garbage collection
- Conservative Garbage Collection for General Memory Allocators (GRR, MS, CF), pp. 71–79.
- LCTES-2000-ChildersN #order #power management #transaction
- Reordering Memory Bus Transactions for Reduced Power Consumption (BRC, TN), pp. 146–161.
- OSDI-2000-BrownM #physics #using
- Taming the Memory Hogs: Using Compiler-Inserted Releases to Manage Physical Memory Intelligently (ADB, TCM), pp. 31–44.
- PDP-2000-BaiardiGMR #compilation #evaluation #parallel
- Evaluation of a virtual shared memory machine by the compilation of data parallel loops (FB, DG, PM, LR), pp. 309–316.
- PDP-2000-BrzezinskiW #algorithm #consistency #distributed #requirements
- Consistency requirements of distributed shared memory for Lamport’s bakery algorithm for mutual exclusion (JB, DW), pp. 220–226.
- PDP-2000-Rowstron #distributed #fault tolerance #using
- Using agent wills to provide fault-tolerance in distributed shared memory systems (AITR), pp. 317–324.
- PDP-2000-SahuquilloFCGP #multi #self
- Self-similarity in SPLASH-2 workloads on shared memory multiprocessors systems (JS, TNF, JCC, JAG, AP), pp. 293–300.
- CL-2000-MazurJB #analysis #reuse
- A Module Based Analysis for Memory Reuse in Mercury (NM, GJ, MB), pp. 1255–1269.
- ICDAR-1999-MisraAC #image #performance
- A Memory Efficient Method for Fast Transposing Run-length Encoded Images (VM, JFA, AKC), pp. 161–164.
- SIGMOD-1999-BaulierBGGHJKKMMNNRSSSWW #database #in memory #performance
- DataBlitz Storage Manager: Main Memory Database Performance for Critical Applications (JB, PB, SG, CG, SH, SJ, AK, HFK, PM, JM, PPSN, MN, RR, SS, AS, SS, MW, CW), pp. 519–520.
- VLDB-1999-BonczMK #architecture #database
- Database Architecture Optimized for the New Bottleneck: Memory Access (PAB, SM, MLK), pp. 54–65.
- VLDB-1999-Chawathe
- Comparing Hierarchical Data in External Memory (SSC), pp. 90–101.
- VLDB-1999-RaoR #in memory
- Cache Conscious Indexing for Decision-Support in Main Memory (JR, KAR), pp. 78–89.
- ITiCSE-1999-CabezaCR #behaviour #education #named
- CacheSim: a cache simulator for teaching memory hierarchy behaviour (MLCC, MIGC, MLR), p. 181.
- ICALP-1999-Bruijn
- A Model for Associative Memory, a Basis for Thinking and Consciousness (NGdB), pp. 74–89.
- ICALP-1999-Vitter #data type #online
- Online Data Structures in External Memory (JSV), pp. 119–133.
- HCI-CCAD-1999-AttreeRB #artificial reality #assessment
- Virtual reality in assessment and rehabilitation of impaired memory following brain damage (EAA, FDR, BMB), pp. 1100–1104.
- HCI-CCAD-1999-DuLL #development #metric #using
- Using the memory load measurement to improve software development (TCD, CJL, CGL), pp. 53–57.
- HCI-EI-1999-Davies99a #generative #strict
- The role of external memory in a complex task: Effects of device and memory restrictions on program generation (SPD), pp. 1268–1272.
- ACIR-1999-ChennawasinCC #empirical #information retrieval #user interface
- An Empirical Study of Memory and Information Retrieval with a Spatial User Interface (CC, JC, CC).
- ICML-1999-PeshkinMK #learning #policy
- Learning Policies with External Memory (LP, NM, LPK), pp. 307–314.
- ICML-1999-ZhouB #algorithm #approach #hybrid #learning #parametricity #requirements
- A Hybrid Lazy-Eager Approach to Reducing the Computation and Memory Requirements of Local Parametric Learning Algorithms (YZ, CEB), p. 503–?.
- ECOOP-1999-PauwS #java #visualisation
- Visualizing Reference Patterns for Solving Memory Leaks in Java (WDP, GS), pp. 116–134.
- OOPSLA-1999-SweeneyG #inheritance #layout #multi
- Space and Time-Efficient Memory Layout for Multiple Inheritance (PFS, JYG), pp. 256–275.
- POPL-1999-CraryWM #calculus
- Typed Memory Management in a Calculus of Capabilities (KC, DW, JGM), pp. 262–275.
- CC-1999-BrandKO #asf+sdf #compilation
- Compilation and Memory Management for ASF+SDF (MvdB, PK, PAO), pp. 198–213.
- CC-1999-Dinechin #scheduling
- Extending Modulo Scheduling with Memory Reference Merging (BDdD), pp. 274–287.
- DAC-1999-ShiueC #embedded #power management
- Memory Exploration for Low Power, Embedded Systems (WTS, CC), pp. 140–145.
- DAC-1999-VandecappelleMBCV #design #feedback #multi #using
- Global Multimedia System Design Exploration Using Accurate Memory Organization Feedback (AV, MM, EB, FC, DV), pp. 327–332.
- DAC-1999-ZhaoM #array #estimation
- Exact Memory Size Estimation for Array Computations without Loop Unrolling (YZ, SM), pp. 811–816.
- DATE-1999-ZarrinehU #architecture #on the #programmable
- On Programmable Memory Built-In Self Test Architectures (KZ, SJU), pp. 708–713.
- HPCA-1999-BilasJZS #approach #performance
- Limits to the Performance of Software Shared Memory: A Layered Approach (AB, DJ, YZ, JPS), pp. 193–202.
- HPCA-1999-CarterHSSZBDKKPST #named
- Impulse: Building a Smarter Memory Controller (JBC, WCH, LS, MRS, LZ, EB, AD, CCK, RK, MAP, LS, TT), pp. 70–79.
- HPCA-1999-CondonHPS #modelling #using
- Using Lamport Clocks to Reason about Relaxed Memory Models (AC, MDH, MP, DJS), pp. 270–278.
- HPCA-1999-CoxLHZ #comparison #consistency #lazy evaluation #performance #protocol
- A Performance Comparison of Homeless and Home-Based Lazy Release Consistency Protocols in Software Shared Memory (ALC, EdL, YCH, WZ), pp. 279–283.
- HPCA-1999-DwarkadasGKSSS #comparative #distributed #evaluation
- Comparative Evaluation of Fine- and Coarse-Grain Approaches for Software Distributed Shared Memory (SD, KG, LIK, DJS, MLS, RS), pp. 260–269.
- HPCA-1999-GatlinC #performance
- Memory Hierarchy Considerations for Fast Transpose and Bit-Reversals (KSG, LC), pp. 33–42.
- HPCA-1999-HongMSKAW #effectiveness #order
- Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory (SIH, SAM, MHS, RHK, JHA, WAW), pp. 80–89.
- HPCA-1999-InoueKM #logic
- Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory Bandwidth of Merged DRAM/Logic LSIs (KI, KK, KM), pp. 218–222.
- HPCA-1999-IyerB #framework #latency #multi
- Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA Multiprocessors (RRI, LNB), pp. 152–160.
- HPCA-1999-MichaelN #design #multi #performance #scalability
- Design and Performance of Directory Caches for Scalable Shared Memory Multiprocessors (MMM, AKN), pp. 142–151.
- HPCA-1999-TanakaMH #distributed #hardware #lightweight
- Lightweight Hardware Distributed Shared Memory Supported by Generalized Combining (KT, TM, KH), pp. 90–99.
- HPDC-1999-AlmasiCP #matlab #named #programming
- MATmarks: A Shared Memory Environment for MATLAB Programming (GSA, CC, DAP), pp. 341–342.
- HPDC-1999-CoadyOF #clustering #embedded #network #using
- Using Embedded Network Processors to Implement Global Memory Management in a Workstation Cluster (YC, JSO, MJF), pp. 319–328.
- HPDC-1999-KoussihAS #clustering #named
- Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters (SK, AA, SS), pp. 301–308.
- HPDC-1999-UengSLL #configuration management #distributed #named #runtime
- Proteus: A Runtime Reconfigurable Distributed Shared Memory System (JCU, CKS, WHL, CCL), pp. 347–348.
- LCTES-1999-Persson #analysis #embedded #garbage collection
- Live Memory Analysis for Garbage Collection in Embedded Systems (PP), pp. 45–54.
- OSDI-1999-GamsaKAS #concurrent #locality #multi #named #operating system
- Tornado: Maximizing Locality and Concurrency in a Shared Memory Multiprocessor Operating System (BG, OK, JA, MS), pp. 87–100.
- PPoPP-1999-McCurdyM #architecture #distributed #evaluation #paradigm #simulation
- An Evaluation of Computing Paradigms for N-Body Simulations on Distributed Memory Architectures (CM, JMMC), pp. 25–36.
- PPoPP-1999-RamachandranNHRK #abstraction #interactive #parallel #programming
- Space-Time Memory: A Parallel Programming Abstraction for Interactive Multimedia Applications (UR, RSN, NH, JMR, KK), pp. 183–192.
- PPoPP-1999-TangSY #execution #multi #runtime #thread
- Compile/Run-Time Support for Threaded MPI Execution on Multiprogrammed Shared Memory Machines (HT, KS, TY), pp. 107–118.
- ICLP-1999-GuptaP #distributed #named
- Stack-splitting: Or-/And-parallelism on Distributed Memory Machines (GG, EP), pp. 290–304.
- PODS-1998-Vitter #algorithm
- External Memory Algorithms (JSV), pp. 119–128.
- SIGMOD-1998-LarsonG #generative #sorting
- Memory Management During Run Generation in External Sorting (PÅL, GG), pp. 472–483.
- SIGMOD-1998-RajagopalanML #approximate
- Approximate Medians and other Quantiles in One Pass and with Limited Memory (GSM, SR, BGL), pp. 426–435.
- ICSM-1998-HarmanSD #analysis #slicing #using
- Analysis of Dynamic Memory Access Using Amorphous Slicing (MH, YS, SD), p. 336–?.
- ICSM-1998-Tonella #diagrams #encapsulation #using
- Using the O-A Diagram to Encapsulate Dynamic Memory Access (PT), pp. 326–335.
- PASTE-1998-DorRS #analysis #detection #experience #fault #pointer
- Detecting Memory Errors via Static Pointer Analysis (Preliminary Experience) (ND, MR, SS), pp. 27–34.
- IFL-1998-Grelck #multi
- Shared Memory Multiprocessor Support for SAC (CG), pp. 38–53.
- CHI-1998-LarsonC #design #information retrieval #web
- Web Page Design: Implications of Memory, Structure and Scent for Information Retrieval (KL, MC), pp. 25–32.
- CSCW-1998-AckermanH
- Considering an Organization’s Memory (MSA, CH), pp. 39–48.
- CIKM-1998-NagD #query
- Memory Allocation Strategies for Complex Decision Support Queries (BN, DJD), pp. 116–123.
- ICPR-1998-SuzukiKM #fuzzy #set #using
- Associative memory system using fuzzy sets (YS, NK, JM), pp. 331–333.
- KDD-1998-ParthasarathyZL #mining #parallel
- Memory Placement Techniques for Parallel Association Mining (SP, MJZ, WL), pp. 304–308.
- ECOOP-1998-CordsenS #case study #experience #paradigm #using
- Experiences Developing a Virtual Shared Memory System Using High-Level Object Paradigms (JC, JN, WSP), pp. 285–306.
- PLDI-1998-GayA
- Memory Management with Explicit Regions (DG, AA), pp. 313–323.
- SAC-1998-AhmedDR #fuzzy #graph #performance #reuse #using
- Fast recall of reusable fuzzy plans using acyclic directed graph memory (MA, ED, DCR), pp. 272–276.
- SAC-1998-ShiG #on-demand
- Trading memory for disk bandwidth in video-on-demand servers (WS, SG), pp. 505–512.
- ASPLOS-1998-CooperH
- Compiler-Controlled Memory (KDC, TJH), pp. 2–11.
- ASPLOS-1998-JacobM
- A Look at Several Memory Management Units, TLB-Refill Mechanisms, and Page Table Organizations (BLJ, TNM), pp. 295–306.
- ASPLOS-1998-MachanickSP #implementation #trade-off
- Hardware-Software Trade-Offs in a Direct Rambus Implementation of the RAMpage Memory Hierarchy (PM, PS, LP), pp. 105–114.
- ASPLOS-1998-PeirLH #adaptation #behaviour
- Capturing Dynamic Memory Reference Behavior with Adaptive Cache Topology (JKP, YL, WWH), pp. 240–250.
- ASPLOS-1998-Temam #performance
- Investigating Optimal Local Memory Performance (OT), pp. 218–227.
- DATE-1998-OgawaKK #named
- PASTEL: A Parameterized Memory Characterization System (KO, MK, FK), pp. 15–20.
- HPCA-1998-BasuT #multi
- Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma (SB, JT), pp. 152–161.
- HPCA-1998-EkanadhamLPS #architecture #named #scalability
- PRISM: An Integrated Architecture for Scalable Shared Memory (KE, BHL, PP, MS), pp. 140–151.
- HPCA-1998-MowyCL #comparative #distributed #evaluation #latency
- Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory (TCM, CQCC, AKWL), pp. 300–311.
- HPCA-1998-ScalesGA #clustering #distributed
- Fine-Grain Software Distributed Shared Memory on SMP Clusters (DJS, KG, AA), pp. 125–136.
- HPDC-1998-RoyC #clustering #distributed #multi #named #string #symmetry
- Strings: A High-Performance Distributed Shared Memory for Symmetrical Multiprocessor Clusters (SR, VC), pp. 90–97.
- ISMM-1998-DemoenS #prolog
- Memory Management for Prolog with Tabling (BD, KFS), pp. 97–106.
- ISMM-1998-JohnstoneW #problem #question
- The Memory Fragmentation Problem: Solved? (MSJ, PRW), pp. 26–36.
- ISMM-1998-LarsonK
- Memory Allocation for Long-Running Server Applications (PÅL, MK), pp. 176–185.
- LCTES-1998-AnantharamanP #clustering #embedded #performance
- An Efficient Data Partitioning Method for Limited Memory Embedded Systems (SA, SP), pp. 108–222.
- LCTES-1998-LeeLLMK #realtime #scheduling
- Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems (SL, CGL, ML, SLM, CSK), pp. 51–64.
- PDP-1998-FernandezA #architecture #multi #named #network
- COMA-BC: a cache only memory architecture multicomputer for non-hierarchical common bus networks (BSF, JAIA), pp. 502–508.
- PDP-1998-GonzalezCP #distributed #multi
- Solving sparse triangular systems on distributed memory multicomputers (PG, JCC, TFP), pp. 470–478.
- PDP-1998-MorenoFZCT #analysis #biology #multi #sequence
- Biological sequence analysis on distributed-shared memory multiprocessors (ARM, LGdlF, ELZ, JMC, OT), pp. 20–26.
- TACAS-1998-VelevB #array #modelling #performance #simulation
- Efficient Modeling of Memory Arrays in Symbolic Ternary Simulation (MNV, REB), pp. 136–150.
- CAV-1998-IslesHB #infinity
- Computing Reachable Control States of Systems Modeled with Uninterpreted Functions and Infinite Memory (AJI, RH, RKB), pp. 256–267.
- CAV-1998-NalumasuGMG #approach #model checking #modelling #multi #verification
- The “Test Model-Checking” Approach to the Verification of Formal Memory Models of Multiprocessors (RN, RG, AM, GG), pp. 464–476.
- CAV-1998-SternD #in memory #using #verification
- Using Magnatic Disk Instead of Main Memory in the Murphi Verifier (US, DLD), pp. 172–183.
- ICDAR-1997-NavoniCCGKR #recognition #using #word
- Words Recognition using Associative Memory (LN, RC, MC, GG, AK, PLR), pp. 97–101.
- ICDAR-1997-VossepoelSD #performance
- Memory efficient skeletonization of utility maps (AMV, KS, CFPD), pp. 797–800.
- VLDB-1997-BohannonLRSSS #database #in memory #logic #physics #version control
- Logical and Physical Versioning in Main Memory Databases (RR, SS, PB, DWL, AS, SS), pp. 86–95.
- VLDB-1997-ChangG #effectiveness
- Effective Memory Use in a Media Server (EYC, HGM), pp. 496–505.
- VLDB-1997-HelmerM #algorithm #comparison #evaluation #in memory #set
- Evaluation of Main Memory Join Algorithms for Joins with Set Comparison Join Predicates (SH, GM), pp. 386–395.
- VLDB-1997-NgC #database #reliability
- Integrating Reliable Memory in Databases (WTN, PMC), pp. 76–85.
- VLDB-1997-ZhangL
- Dynamic Memory Adjustment for External Mergesort (WZ, PÅL), pp. 376–385.
- FME-1997-YoungB #analysis #modelling
- Mathematical Modeling and Analysis of an External Memory Manager (WDY, WRB), pp. 237–257.
- ICFP-1997-UngureanuG #distributed #formal method #modelling
- Formal Models of Distributed Memory Management (CU, BG), pp. 280–291.
- ICML-1997-SakrLCHG #data access #learning #modelling #multi #predict
- Predicting Multiprocessor Memory Access Patterns with Learning Models (MFS, SPL, DMC, BGH, CLG), pp. 305–312.
- PLDI-1997-ChandraCCMNA #distributed #multi
- Data Distribution Support on Distributed Shared Memory Multiprocessors (RC, DKC, RC, DEM, NN, JAMA), pp. 334–345.
- SAC-1997-Haynes
- Collective memory search (TH), pp. 217–222.
- DAC-1997-AdeLP #data flow #graph
- Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets (MA, RL, JAP), pp. 64–69.
- DAC-1997-Gebotys #energy #network #using
- Low Energy Memory and Register Allocation Using Network Flow (CHG), pp. 435–440.
- DAC-1997-LiW #multi #synthesis
- A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors (YL, WW), pp. 153–156.
- DAC-1997-ManneGS #locality
- Remembrance of Things Past: Locality and Memory in BDDs (SM, DG, FS), pp. 196–201.
- EDTC-1997-BeckmannH #constraints #in memory #logic programming #synthesis #using
- Using constraint logic programming in memory synthesis for general purpose computers (RB, JH), p. 619.
- EDTC-1997-GoorGYM #fault
- March LA: a test for linked memory faults (AJvdG, GG, VNY, VGM), p. 627.
- EDTC-1997-PandaDN #embedded #performance
- Efficient utilization of scratch-pad memory in embedded processor applications (PRP, NDD, AN), pp. 7–11.
- HPCA-1997-Sivasubramaniam #communication #multi
- Reducing the Communication Overhead of Dynamic Applications on Shared Memory Multiprocessors (AS), pp. 194–203.
- HPCA-1997-StrickerG #parallel #performance
- Global Address Space, Non-Uniform Bandwidth: A Memory System Performance Characterization of Parallel Systems (TS, TRG), pp. 168–179.
- HPCA-1997-TrancosoLZT #multi #performance
- The Memory Performance of DSS Commercial Workloads in Shared-Memory Multiprocessors (PT, JLLP, ZZ, JT), pp. 250–260.
- HPCA-1997-YangT #multi
- Speeding up the Memory Hierarchy in Flat COMA Multiprocessors (LY, JT), pp. 4–13.
- PDP-1997-Brandes #compilation #fortran #performance
- Compiling high performance fortran for shared memory and shared virtual memory systems (TB), pp. 289–296.
- PDP-1997-GiloiS #architecture #distributed #programming
- A high-level programming environment for distributed memory architectures (WKG, AS), pp. 369–375.
- PDP-1997-MoritzT #parallel #source code
- A static mapping system for logically shared memory parallel programs (CAM, LET), pp. 265–272.
- PPoPP-1997-AmzaCRZ #distributed #trade-off
- Trade-offs Between False Sharing and Aggregation in Software Distributed Shared Memory (CA, ALC, KR, WZ), pp. 90–99.
- PPoPP-1997-ChandraL #communication #distributed #optimisation #source code
- Optimizing Communication in HPF programs for Fine-Grain Distributed Shared Memory (SC, JRL), pp. 100–111.
- PPoPP-1997-JiangSS #multi #performance
- Application Restructuring and Performance Portability on Shared Virtual Memory and Hardware-Coherent Multiprocessors (DJ, HS, JPS), pp. 217–229.
- PPoPP-1997-LuCDRZ #compilation #distributed
- Compiler and Software Distributed Shared Memory Support for Irregular Applications (HL, ALC, SD, RR, WZ), pp. 48–56.
- PPoPP-1997-XuLM #performance #profiling
- Shared Memory Performance Profiling (ZX, JRL, BPM), pp. 240–251.
- SOSP-1997-ScalesG #distributed #performance #towards
- Towards Transparent and Efficient Software Distributed Shared Memory (DJS, KG), pp. 157–169.
- SOSP-1997-StetsDHHKPS #clustering #named #network
- Cashmere-2L: Software Coherent Shared Memory on a Clustered Remote-Write Network (RS, SD, NH, GCH, LIK, SP, MLS), pp. 170–183.
- STOC-1997-ArgeFGV #on the #sorting #string
- On Sorting Strings in External Memory (LA, PF, RG, JSV), pp. 540–548.
- CAV-1997-VelevBJ #array #modelling #performance #simulation
- Efficient Modeling of Memory Arrays in Symbolic Simulation (MNV, REB, AJ), pp. 388–399.
- LICS-1997-DziembowskiJW #game studies #how #infinity #question
- How Much Memory is Needed to Win Infinite Games? (SD, MJ, IW), pp. 99–110.
- VLDB-1996-SarawagiS #database #execution #order #query
- Reordering Query Execution in Tertiary Memory Databases (SS, MS), pp. 156–167.
- CSCW-1996-AckermanM #collaboration
- Answer Garden 2: Merging Organizational Memory with Collaborative Help (MSA, DWM), pp. 97–105.
- ICML-1996-GrolimundG #nearest neighbour
- Speeding-up Nearest Neighbour Memories: The Template Tree Case Memory Organisation (SG, JGG), pp. 225–233.
- ICPR-1996-GroveJ #trade-off
- Space/time trade-offs for associative memory (AJG, DWJ), pp. 296–302.
- ICPR-1996-HancockP #analysis #correlation #exponential
- An analysis of the exponential correlation associative memory (ERH, MP), pp. 291–295.
- ICPR-1996-YamashitaFO #array #interface #realtime
- An integrated memory array processor with a synchronous-DRAM interface for real-time vision applications (NY, YF, SO), pp. 575–580.
- SIGIR-1996-LiuLYR #2d #performance #proximity #query
- Efficient Processing of One and Two Dimensional Proximity Queries in Associative Memory (KLL, GJL, CTY, NR), pp. 138–146.
- ECOOP-1996-KonoKM #distributed #implementation #using
- An Implementation Method of Migratable Distributed Objects Using an RPC Technique Integrated with Virtual Memory Management (KK, KK, TM), pp. 295–315.
- AdaEurope-1996-Waroquiers #ada #exclamation
- Ada Tasking and Dynamic Memory: To Use or Not To Use, That’s a Question! (PW), pp. 460–470.
- PLDI-1996-ChandraRL #named #protocol
- Teapot: Language Support for Writing Memory Coherence Protocols (SC, BR, JRL), pp. 237–248.
- PLDI-1996-Evans #detection #fault #static analysis
- Static Detection of Dynamic Memory Errors (DE), pp. 44–53.
- PLDI-1996-RussinovichC #concurrent #nondeterminism
- Replay For Concurrent Non-Deterministic Shared Memory Applications (MR, BC), pp. 258–266.
- SAC-1996-BurgeN #communication #distributed #performance
- A decentralized communication efficient distributed shared memory (LLBI, MLN), pp. 358–365.
- SAC-1996-HuangG #database #in memory #realtime
- Crash recovery for real-time main memory database systems (JH, LG), pp. 145–149.
- SAC-1996-LinD #database #fuzzy #in memory
- Segmented fuzzy checkpointing for main memory databases (JLL, MHD), pp. 158–165.
- ASPLOS-1996-DwarkadasCZ #distributed #runtime
- An Integrated Compile-Time/Run-Time Software Distributed Shared Memory System (SD, ALC, WZ), pp. 186–197.
- ASPLOS-1996-ErlichsonNCH #clustering #distributed #named #performance
- SoftFLASH: Analyzing the Performance of Clustered Distributed Virtual Shared Memory (AE, NN, GC, JLH), pp. 210–220.
- ASPLOS-1996-JamrozikFVEKLV #latency #network #using
- Reducing Network Latency Using Subpages in a Global Memory Environment (HAJ, MJF, GMV, JEI, ARK, HML, MKV), pp. 258–267.
- ASPLOS-1996-PaiRAH #consistency #evaluation #modelling
- An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors (VSP, PR, SVA, TH), pp. 12–23.
- ASPLOS-1996-ScalesGT #approach #named
- Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory (DJS, KG, CAT), pp. 174–185.
- CC-1996-ChowCLLS #alias #effectiveness #representation
- Effective Representation of Aliases and Indirect Memory Operations in SSA Form (FCC, SC, SML, RL, MS), pp. 253–267.
- DAC-1996-SanghaviRBS #performance
- High Performance BDD Package By Exploiting Memory Hiercharchy (JVS, RKR, RKB, ALSV), pp. 635–640.
- HPCA-1996-AlexanderK #design #distributed
- Distributed Prefetch-buffer/Cache Design for High-Performance Memory Systems (TA, GK), pp. 254–263.
- HPCA-1996-IftodeDFL #automation #using
- Improving Release-Consistent Shared Virtual Memory Using Automatic Update (LI, CD, EWF, KL), pp. 14–25.
- HPCA-1996-KontothanassisS #distributed #interface #network #performance #using
- Using Memory-Mapped Network Interfaces to Improve the Performance of Distributed Shared Memory (LIK, MLS), pp. 166–177.
- HPCA-1996-MullerSW #multi #thread
- Multitasking and Multithreading on a Multiprocessor with Virtual Shared Memory (HLM, PWAS, DHDW), pp. 212–221.
- HPDC-1996-AgusleoS #interface #network
- Employing Logic-Enhanced Memory for High-Performance ATM Network Interfaces (HA, NS), pp. 192–200.
- HPDC-1996-FreehA #distributed
- Dynamically Controlling False Sharing in Distributed Shared Memory (VWF, GRA), pp. 403–411.
- HPDC-1996-NieplochaH #programming
- Shared Memory NUMA Programming on I-WAY (JN, RJH), pp. 432–441.
- HPDC-1996-SilvaSC #distributed
- Portable Transparent Checkpointing for Distributed Shared Memory (LMS, JGS, SC), pp. 422–431.
- PDP-1996-Gerndt #multi #programming
- Programming Shared Virtual Memory Multiprocessor (MG), pp. 2–10.
- PDP-1996-GiloiBS #architecture #distributed #named #performance #prototype
- MANNA: Prototype of a Distributed Memory Architecture with Maximized Sustained Performance (WKG, UB, WSP), pp. 297–304.
- PDP-1996-MollarH #distributed #matrix #multi
- Computing the Singular Values of the Product of Two Matrices in Distributed Memory Multiprocessors (MM, VH), pp. 15–21.
- PDP-1996-MullerSW #architecture #comparison
- The Role of Associative Memory in Virtual Shared Memory Architectures: A Price-Performance Comparison (HLM, PWAS, DHDW), pp. 41–49.
- PDP-1996-SilvaSC #distributed #implementation #library
- Implementing Distributed Shared Memory on Top of MPI: The DSMPI Library (LMS, JGS, SC), pp. 50–58.
- STOC-1996-VengroffV #3d #performance
- Efficient 3-D Range Searching in External Memory (DEV, JSV), pp. 192–201.
- ICDAR-v1-1995-GuyonP #design #markov #modelling #using
- Design of a linguistic postprocessor using variable memory length Markov models (IG, FP), pp. 454–457.
- SIGMOD-1995-MoleskyR #database #protocol
- Recovery Protocols for Shared Memory Database Systems (LDM, KR), pp. 11–22.
- VLDB-1995-Sarawagi #database #query
- Query Processing in Tertiary Memory Databases (SS), pp. 585–596.
- ICALP-1995-NikoletseasRSY #graph #probability
- Stochastic Graphs Have Short Memory: Fully Dynamic Connectivity in Poly-Log Expected Time (SEN, JHR, PGS, MY), pp. 159–170.
- FPCA-1995-MorrisettFH #modelling
- Abstract Models of Memory Management (JGM, MF, RH), pp. 66–77.
- CHI-1995-AltmannLJ #navigation
- Display Navigation by an Expert Programmer: A Preliminary Model of Memory (EMA, JHL, BEJ), pp. 3–10.
- SIGIR-1995-Ruge #modelling
- Human Memory Models and Term Association (GR), pp. 219–227.
- OOPSLA-1995-KristensenL #consistency #problem
- Problem-Oriented Object Memory: Customizing Consistency (AK, CL), pp. 399–413.
- PLDI-1995-AgrawalSD #compilation #distributed #interprocedural
- Interprocedural Partial Redundancy Elimination and its Application to Distributed Memory Compilation (GA, JHS, RD), pp. 258–269.
- PLDI-1995-AikenFL #analysis #higher-order
- Better Static Memory Management: Improving Region-Based Analysis of Higher-Order Languages (AA, MF, RL), pp. 174–185.
- PLDI-1995-CierniakL #distributed
- Unifying Data and Control Transformations for Distributed Shared Memory Machines (MC, WL), pp. 205–217.
- SAC-1995-Purdom #implementation #parallel
- Implementing a system on a shared memory parallel processor (REP), pp. 187–190.
- DAC-1995-FarrahiTS #segmentation
- Memory Segmentation to Exploit Sleep Mode Operation (AHF, GET, MS), pp. 36–41.
- HPCA-1995-Lee #order
- Memory Access Reordering in Vector Processors (DLL), pp. 380–389.
- HPCA-1995-MichaelS #distributed #implementation #multi
- Implementation of Atomic Primitives on Distributed Shared Memory Multiprocessors (MMM, MLS), pp. 222–231.
- HPCA-1995-WesterholzHPH #performance
- Improving Performance by Cache Driven Memory Management (KW, SH, JP, CH), pp. 234–242.
- HPDC-1995-RamanjuanBT #approach #clustering #network #parallel
- Network Shared Memory: A New Approach for Clustering Workstations for Parallel Processing (RSR, JB, KJT), pp. 48–56.
- IWMM-1995-KjelsoJ
- Memory Management in Flash-Memory Disks with Data Compression (MK, SJ), pp. 399–413.
- IWMM-1995-MatthewsS #distributed #garbage collection #named
- LEMMA: A Distributed Shared Memory with Global and Local Garbage Collection (DCJM, TLS), pp. 297–311.
- PDP-1995-BangC #distributed #graph #reduction
- Distributed shared memory for function-grained graph reduction machine (DWB, YKC), pp. 148–155.
- PDP-1995-Blinowski #data flow #modelling #paradigm
- A Shared Memory model based on the Dataflow paradigm (GJB), pp. 68–75.
- PDP-1995-DreierU #distributed #implementation
- Implementing distributed shared memory based on DCE (BD, TU), pp. 84–90.
- PDP-1995-GuarracinoP #algorithm #architecture #distributed #parallel
- A parallel modified block Lanczos’ algorithm for distributed memory architectures (MRG, FP), pp. 424–431.
- PDP-1995-RauberR #distributed #multi
- Iterated Runge-Kutta methods on distributed memory multiprocessors (TR, GR), pp. 12–19.
- PPoPP-1995-JeremiassenE #data transformation #multi
- Reducing False Sharing on Shared Memory Multiprocessors through Compile Time Data Transformations (TEJ, SJE), pp. 179–188.
- PPoPP-1995-KennedyNS #algorithm #linear #sequence #source code
- A Linear-Time Algorithm for Computing the Memory Access Sequence in Data-Parallel Programs (KK, NN, AS), pp. 102–111.
- SOSP-1995-CheritonD
- Logged Virtual Memory (DRC, KJD), pp. 26–39.
- SOSP-1995-FeeleyMPKL #clustering #implementation
- Implementing Global Memory Management in a Workstation Cluster (MJF, WEM, FHP, ARK, HML, CAT), pp. 201–212.
- SOSP-1995-JohnsonKW #distributed #named
- CRL: High-Performance All-Software Distributed Shared Memory (KLJ, MFK, DAW), pp. 213–228.
- STOC-1995-NisanW #complexity #on the
- On the complexity of bilinear forms: dedicated to the memory of Jacques Morgenstern (NN, AW), pp. 723–732.
- CAV-1995-BernMS
- Global rebuilding of OBDDs Avoiding Memory Requirement Maxima (JB, CM, AS), pp. 4–15.
- ICLP-1995-NilssonTW #deduction #distributed #named #query #realtime
- Amnesia — A Distributed Real-Time Primary Memory DBMS with a Deductive Query Language (HN, TT, CW), p. 821.
- SIGMOD-1994-PangCL #query #realtime
- Managing Memory for Real-Time Queries (HP, MJC, ML), pp. 221–232.
- VLDB-1994-JagadishLRSS #in memory #named #performance
- Dalí: A High Performance Main Memory Storage Manager (HVJ, DFL, RR, AS, SS), pp. 48–59.
- CSCW-1994-Ackerman #case study
- Augmenting the Organizational Memory: A Field Study of Answer Garden (MSA), pp. 243–252.
- AdaEurope-1994-ArberetD #tool support
- Test Methods and Tools for SOHO Mass Memory Unit Software (PA, LD), pp. 121–129.
- PLDI-1994-DavidsonJ
- Memory Access Coalescing: A technique for Eliminating Redundant memory Accesses (JWD, SJ), pp. 186–195.
- PLILP-1994-HundehegeLX #hybrid #optimisation #program transformation #runtime #semantics
- Semantic-Based Static Program Transformations for Memory Space and Run Time Optimization in Hybrid Languages (JBH, WML, UX), pp. 453–454.
- PLILP-1994-SaenzHRW #specification
- Shared Memory System for Babel: a VHDL Specification (FS, WH, JJR, SW), pp. 461–462.
- POPL-1994-DiwanTM #garbage collection #performance #source code #using
- Memory Subsystem Performance of Programs Using Copying Garbage Collection (AD, DT, JEBM), pp. 1–14.
- ASPLOS-1994-GallagherCMGH #ambiguity #using
- Dynamic Memory Disambiguation Using the Memory Conflict Buffer (DMG, WYC, SAM, JCG, WmWH), pp. 183–193.
- ASPLOS-1994-HeinleinGDG #integration #message passing #multi
- Integration of Message Passing and Shared Memory in the Stanford FLASH Multiprocessor (JH, KG, SD, AG), pp. 38–50.
- ASPLOS-1994-LarusRV #implementation #named #parallel
- LCM: Memory System Support for Parallel Language Implementation (JRL, BR, GV), pp. 208–218.
- ASPLOS-1994-SchoinasFLRLW #data access #distributed
- Fine-grain Access Control for Distributed Shared Memory (IS, BF, ARL, SKR, JRL, DAW), pp. 297–306.
- ASPLOS-1994-WuZ #in memory #named
- eNVy: A Non-Volatile, Main Memory Storage System (MW, WZ), pp. 86–97.
- DAC-1994-KolsonND #synthesis
- Minimization of Memory Traffic in High-Level Synthesis (DJK, AN, NDD), pp. 149–154.
- DAC-1994-VerbauwhedeSR #estimation #synthesis
- Memory Estimation for High Level Synthesis (IV, CJS, JMR), pp. 143–148.
- HPDC-1994-SrbljicVB #consistency #distributed #performance #predict
- Performance Prediction for Different Consistency Schemes in Distributed Shared Memory Systems (SS, ZGV, LB), pp. 295–302.
- PDP-1994-ChenK #execution #flexibility #interface #network #performance
- Integrating Memory And Network Accesses : A Flexible Processor-network Interface For Efficient Application Execution (YYC, CTK), pp. 103–110.
- PDP-1994-LevrouwAC #source code
- A New Trace And Replay System For Shared Memory Programs Based On Lamport Clocks (LL, KMRA, JMVC), pp. 471–478.
- CAV-1994-Graf #abstraction #distributed #using #verification
- Verification of a Distributed Cache Memory by Using Abstractions (SG), pp. 207–219.
- SIGMOD-1993-ShatdalN #parallel #using
- Using Shared Virtual Memory for Parallel Join Processing (AS, JFN), pp. 119–128.
- VLDB-1993-BrownCL #multi
- Managing Memory to Meet Multiclass Workload Response Time Goals (KPB, MJC, ML), pp. 328–341.
- VLDB-1993-MehtaD #multi
- Dynamic Memory Allocation for Multiple-Query Workloads (MM, DJD), pp. 354–367.
- RTA-1993-ChakrabartiY #algorithm #correctness #distributed #on the
- On the Correctness of a Distributed Memory Gröbner basis Algorithm (SC, KAY), pp. 77–91.
- HCI-SHI-1993-SakaOK #modelling
- A Human Memory Model Based on Search Patterns (TS, HO, NKI), pp. 849–854.
- INTERCHI-1993-BerlinJOPW #design #using
- Where did you put it? Issues in the design and use of a group memory (LMB, RJ, VLO, AP, CW), pp. 23–30.
- INTERCHI-1993-TerveenSL #design
- From “folklore” to “living design memory” (LGT, PGS, MDL), pp. 15–22.
- ICML-1993-McCallum
- Overcoming Incomplete Perception with Util Distinction Memory (AM), pp. 190–196.
- ECOOP-1993-Lamming #challenge #question #research
- Intimate Computing and the Memory Prothesis: A Challenge for Computer Systems Research? (MGL), pp. 1–3.
- OOPSLA-1993-KruegerLVA #development #tool support
- Tools for the Development of Application-Specific Virtual Memory Management (KK, DL, AV, TEA), pp. 48–64.
- PLDI-1993-AmarasingheL #code generation #communication #distributed #optimisation
- Communication Optimization and Code Generation for Distributed Memory Machines (SPA, MSL), pp. 126–138.
- PLDI-1993-BarrettZ #performance #predict #using
- Using Lifetime Predictors to Improve Memory Allocation Performance (DAB, BGZ), pp. 187–196.
- PLDI-1993-GrunwaldZH #locality
- Improving the Cache Locality of Memory Allocation (DG, BGZ, RH), pp. 177–186.
- PLDI-1993-KernsE #latency #nondeterminism #scheduling
- Balanced Scheduling: Instruction Scheduling When Memory Latency is Uncertain (DRK, SJE), pp. 278–289.
- PLILP-1993-BarklundB #bound #multi
- Executing Bounded Quantifications on Shared Memory Multiprocessors (JB, JB), pp. 302–317.
- PLILP-1993-BenjumeaT #distributed #parallel #prolog
- An OR Parallel Prolog Model for Distributed Memory Systems (VB, JMT), pp. 291–301.
- TRI-Ada-1993-KermarrecP #ada #distributed
- A Distributed Shared Virtual Memory for Ada 83 and Ada 9X Applications (YK, LP), pp. 242–251.
- Best-of-PLDI-1993-KernsE93a #latency #nondeterminism #scheduling
- Balanced scheduling: instruction scheduling when memory latency is uncertain (with retrospective) (DRK, SJE), pp. 515–527.
- HPDC-1993-BanerjiKTGC #clustering #distributed
- High-Performance Distributed Shared Memory Substrate for Workstation Clusters (AB, DCK, JMT, PMG, DLC), pp. 344–351.
- HPDC-1993-SrbljicB #evaluation #performance #replication
- Analytical Performance Evaluation of Data Replication Based Shared Memory Model (SS, LB), pp. 326–335.
- HPDC-1993-WehnerABDEMFMMS #distributed #performance #towards
- Toward a High Performance Distributed Memory Climate Model (MFW, JJA, JCB, WPD, PGE, AAM, JDF, CCM, CRM, JAS), pp. 102–113.
- PDP-1993-BadiaV #algorithm #distributed #parallel
- A parallel algorithm to solve tridiagonal systems on distributed memory multiprocessors (JMB, AMV), pp. 203–210.
- PDP-1993-BijnensJB #parallel #verification
- Load balanced parallel program verification on a shared memory machine (SB, WJ, YB), pp. 161–168.
- PDP-1993-ClematisT #analysis #distributed #message passing
- An analysis of message passing systems for distributed memory computers (AC, OT), pp. 299–306.
- PDP-1993-LevrouwA #performance #source code
- An efficient record-replay mechanism for shared memory programs (LL, KA), pp. 169–176.
- PDP-1993-MoisanDC #concurrent #distributed #network #object-oriented #programming #simulation
- An object-oriented concurrent programming model for simulation applications on distributed memory processors network (BM, YD, RC), pp. 78–85.
- PDP-1993-VerdierDJ #parallel
- Addressing scheme for a parallel memory system (CV, AD, FJ), pp. 131–135.
- PPoPP-1993-ChakrabartiY #distributed #implementation #multi
- Implementing an Irregular Application on a Distributed Memory Multiprocessor (SC, KAY), pp. 169–178.
- SOSP-1993-ChenB #operating system #performance
- The Impact of Operating System Structure on Memory System Performance (JBC, BNB), pp. 120–133.
- SOSP-1993-HoskingM #object-oriented
- Protection Traps and Alternatives for Memory Management of an Object-Oriented Language (ALH, JEBM), pp. 106–119.
- SOSP-1993-SatyanarayananMKSK #lightweight
- Lightweight Recoverable Virtual Memory (MS, HHM, PK, DCS, JJK), pp. 146–160.
- STOC-1993-DworkHW #algorithm
- Contention in shared memory algorithms (CD, MH, OW), pp. 174–183.
- ICLP-1993-MantsivodaPW #constraints
- Memory Management of Constraint in Flang (AM, VP, AW), pp. 633–646.
- SIGMOD-1992-AnalytiP #database #in memory #performance
- Fast Search in Main Memory Databases (AA, SP), pp. 215–224.
- VLDB-1992-FranklinCL #architecture #database
- Global Memory Management in Client-Server Database Architectures (MJF, MJC, ML), pp. 596–609.
- LFP-1992-ChirimarGR #invariant #linear #logic #proving
- Proving Memory Management Invariants for a Language Based on Linear Logic (JC, CAG, JGR), pp. 139–150.
- LFP-1992-CooperNS #garbage collection #performance #using
- Improving the Performance of SML Garbage Collection Using Application-Specific Virtual Memory Management (EC, SN, IS), pp. 43–52.
- SIGIR-1992-MasandLW #reasoning #using
- Classifying News Stories using Memory Based Reasoning (BMM, GL, DLW), pp. 59–65.
- ECOOP-1992-Jezequel #distributed #eiffel #named #parallel
- EPEE: an Eiffel Environment to Program Distributed Memory Parallel Computers (JMJ), pp. 197–212.
- OOPSLA-1992-FeeleyL #distributed #version control
- Distributed Shared Memory with Versioned Objects (MJF, HML), pp. 247–262.
- POPL-1992-ChowH #analysis #parallel #source code
- Compile-Time Analysis of Parallel Programs that Share Memory (JHC, WLHI), pp. 130–141.
- SOSP-WIP-1991-HartyC92 #physics #using
- Application-Controlled Physical Memory using External Page-Cache Management (KH, DRC), p. 19.
- ASPLOS-1992-BakerADOS #file system #performance #reliability
- Non-Volatile Memory for Fast, Reliable File Systems (MB, SA, ED, JKO, MIS), pp. 10–22.
- ASPLOS-1992-ChenB #latency
- Reducing Memory Latency via Non-blocking and Prefetching Caches (TFC, JLB), pp. 51–61.
- ASPLOS-1992-HartyC #physics #using
- Application-Controlled Physical Memory using External Page-Cache Management (KH, DRC), pp. 187–197.
- ASPLOS-1992-HillLRW #hardware #multi #scalability
- Cooperative Shared Memory: Software and Hardware Support for Scalable Multiprocesors (MDH, JRL, SKR, DAW), pp. 262–273.
- ASPLOS-1992-KubiatowiczCA #multi #transaction
- Closing the Window of Vulnerability in Multiphase Memory Transactions (JK, DC, AA), pp. 274–284.
- DAC-1992-BoseA #concurrent #fault #logic #message passing #multi #simulation
- Concurrent Fault Simulation of Logic Gates and Memory Blocks on Message Passing Multicomputers (SB, PA), pp. 332–335.
- HPDC-1992-Wittie #distributed #tutorial
- Tutorial III: Distributed Shared Memory Systems (LDW), p. 284.
- IWMM-1992-BekkersRU #logic programming #programming language
- Dynamic Memory Management for Sequential Logic Programming Languages (YB, OR, LU), pp. 82–102.
- IWMM-1992-LangendoenMV #parallel
- Memory Management for Parallel Tasks in Shared Memory (KL, HLM, WGV), pp. 165–178.
- IWMM-1992-SergentB #architecture #concurrent #garbage collection #incremental #multi #thread
- Incremental Multi-threaded Garbage Collection on Virtual Shared Memory Architectures (TLS, BB), pp. 179–199.
- IWMM-1992-Tarau #continuation #prolog
- Ecological Memory Management in a Continuation Passing Prolog Engine (PT), pp. 344–356.
- IWMM-1992-Yuasa #architecture #garbage collection #lisp #parallel
- Memory Management and Garbage Collection of an Extended Common Lisp System for Massively Parallel SIMD Architecture (TY), pp. 490–506.
- STOC-1992-KarpLH #distributed #performance #simulation
- Efficient PRAM Simulation on a Distributed Memory Machine (RMK, ML, FMadH), pp. 318–326.
- PLILP-1991-BaiardiB #architecture #distributed
- An Architectural Model for OR-Parallelism on Distributed Memory Systems (FB, DMB), pp. 87–98.
- PLILP-1991-LangendoenV #named #parallel #reduction
- FRATS: A Parallel Reduction Strategy for Shared Memory (KL, WGV), pp. 99–110.
- ASPLOS-1991-AppelL #source code
- Virtual Memory Primitives for User Programs (AWA, KL), pp. 96–107.
- ASPLOS-1991-BoloskySFFC #architecture #policy
- NUMA Policies and Their Relation to Memory Architecture (WJB, MLS, RPF, RJF, ALC), pp. 212–221.
- ASPLOS-1991-GharachorlooGH #consistency #evaluation #modelling #multi #performance
- Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors (KG, AG, JLH), pp. 245–257.
- ASPLOS-1991-KatevenisT #branch
- Reducing the Branch Penalty by Rearranging Instructions in Double-Width Memory (MK, NT), pp. 15–27.
- ASPLOS-1991-SohiF
- High-Bandwidth Data Memory Systems for Superscalar Processors (GSS, MF), pp. 53–62.
- DAC-1991-VandrisS #algorithm #fault #performance #simulation
- Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation (EV, GES), pp. 138–143.
- PPoPP-1991-LaRoweWE #multi #operating system
- Exploiting Operating System Support for Dynamic Page Placement on a NUMA Shared Memory Multiprocessor (RPLJ, JTW, CSE), pp. 122–132.
- SOSP-1991-LaRoweEK #robust
- The Robustness of NUMA Memory Management (RPLJ, CSE, LSK), pp. 137–151.
- SOSP-1991-VaswaniZ #multi #scheduling
- The Implications of Cache Affinity on Processor Scheduling for Multiprogrammed, Shared Memory Multiprocessors (RV, JZ), pp. 26–40.
- CSL-1991-Dahlhaus #first-order #how #modelling
- How to Implement First Order Formulas in Local Memory Machine Models (ED), pp. 68–78.
- VLDB-1990-PucheralTV #data transformation #in memory #performance #using
- Efficient Main Memory Data Management Using the DBGraph Storage Model (PP, JMT, PV), pp. 683–695.
- VLDB-1990-SeverancePW #database #distributed #in memory #linear #parallel
- Distributed Linear Hashing and Parallel Projection in Main Memory Databases (CS, SP, PW), pp. 674–682.
- DAC-1990-GrantD #algorithm #synthesis
- Memory, Control and Communications Synthesis for Scheduled Algorithms (DMG, PBD), pp. 162–167.
- DAC-1990-NiermannCP #fault #named #performance #proving
- Proofs: A Fast, Memory Efficient Sequential Circuit Fault Simulator (TMN, WTC, JHP), pp. 535–540.
- DAC-1990-SatoKO #hardware #implementation
- A Hardware Implementation of Gridless Routing Based on Content Addressable Memory (MS, KK, TO), pp. 646–649.
- PPoPP-1990-BennettCZ #distributed #named
- Munin: Distributed Shared Memory Based on Type-Specific Memory Coherence (JKB, JBC, WZ), pp. 168–176.
- PPoPP-1990-KoelbelMR #architecture #data type #distributed
- Supporting Shared Data Structures on Distributed Memory Architectures (CK, PM, JVR), pp. 177–186.
- CAV-1990-CourcoubetisVWY #algorithm #performance #verification
- Memory Efficient Algorithms for the Verification of Temporal Properties (CC, MYV, PW, MY), pp. 233–242.
- CLP-1990-BoscoCMPS90 #architecture #distributed #functional #logic
- Logic and Functional Programmin on Distributed Memory Architectures (PGB, CC, CM, MP, GS), pp. 325–339.
- CSL-1990-GrandjeanR #ram #robust
- RAM with Compact Memory: A Realistic and Robust Model of Computation (EG, JMR), pp. 195–233.
- NACLP-1990-WeemeeuwD #multi
- A la Recherche de la Mémoire Perdue OR Memory Compaction for Shard Memory Multiprocessors (PW, BD), pp. 306–320.
- ICALP-1989-RaghavanS #algorithm #online
- Memory Versus Randomization in On-line Algorithms (PR, MS), pp. 687–703.
- OOPSLA-1989-RussoC #design #multi #object-oriented #operating system #using
- Virtual Memory and Backing Storage Management in Multiprocessor Operating Systems Using Object-Oriented Design Techniques (VFR, RHC), pp. 267–278.
- ASPLOS-1989-Staknis #architecture
- Sheaved Memory: Architectural Support for State Saving and Restoration in Paged Systems (MES), pp. 96–102.
- DAC-1989-ChengY #difference #fault #performance #simulation #using
- Differential Fault Simulation — a Fast Method Using Minimal Memory (WTC, MLY), pp. 424–428.
- SOSP-1989-AbrossimovR #kernel #operating system
- Generic Virtual Memory Management for Operating System Kernels (VA, MR, MS), pp. 123–136.
- SOSP-1989-BoloskyFS #effectiveness
- Simple But Effective Techniques for NUMA Memory Management (WJB, RPF, MLS), pp. 19–31.
- SOSP-1989-CoxF #abstraction #case study #experience #implementation #multi
- The Implementation of a Coherent Memory Abstraction on a NUMA Multiprocessor: Experiences with PLATINUM (ALC, RJF), pp. 32–44.
- SOSP-1989-FleischP #design #distributed #named
- Mirage: A Coherent Distributed Shared Memory Design (BDF, GJP), pp. 211–223.
- NACLP-1989-GuptaJ #parallel
- Combined And-Or Parallelism on Shared Memory Multiprocessors (GG, BJ), pp. 332–349.
- SIGIR-1988-NgB #information retrieval #process
- Activity Memory for Text Information Retrieval (YHN, SPVB), pp. 613–627.
- STOC-1988-AggarwalC #algorithm
- Virtual Memory Algorithms (AA, AKC), pp. 173–185.
- JICSCP-1988-KaleRS88 #execution #independence #logic programming #parallel #source code
- A Memory Organization Independent Binding Environment for AND and OR Parallel Execution of Logic Programs (LVK, RR, WWS), pp. 1223–1240.
- JICSCP-1988-LinK88 #execution #logic programming #multi #source code #summary
- AND-Parallel Execution of Logic Programs on a Shared Memory Multiprocessor: A Summary of Results (YJL, VK), pp. 1123–1141.
- JICSCP-1988-Shankar88 #architecture #logic programming #unification
- A Hierarchical Associative Memory Architecture for Logic Programming Unification (SS), pp. 1428–1447.
- JICSCP-1988-StormonBOR88 #agile #architecture #execution #prolog
- An Architecture Based on Content-Addressable Memory for the Rapid Execution of Prolog (CDS, MRB, JVO, DFR), pp. 1448–1473.
- SIGMOD-1987-GrayP #cpu
- The 5 Minute Rule for Trading Memory for Disk Accesses and The 10 Byte Rule for Trading Memory for CPU Time (JG, GRP), pp. 395–398.
- HCI-CE-1987-RootC #interactive #multi
- Multimode Interaction in a Telecommunications Testbed: The Case of Memory Dialing (RWR, CHC), pp. 399–406.
- ECOOP-1987-WilliamsWH #object-oriented
- Dynamic Grouping in an Object-Oriented Virtual Memory Hierarchy (IW, MW, TH), pp. 79–88.
- PLDI-1987-Danvy #higher-order
- Memory allocation and higher-order functions (OD), pp. 241–252.
- ASPLOS-1987-DavidsonV #complexity #performance #set
- The Effect of Instruction Set Complexity on Program Size and Memory Performance (JWD, RAV), pp. 60–64.
- ASPLOS-1987-RashidTYGBBBC #architecture #independence #multi
- Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures (RFR, AT, MY, DBG, RVB, DLB, WJB, JC), pp. 31–39.
- SOSP-1987-YoungTRGECBBB #communication #implementation #multi #operating system
- The Duality of Memory and Communication in the Implementation of a Multiprocessor Operating System (MY, AT, RFR, DBG, JLE, JC, WJB, DLB, RVB), pp. 63–76.
- STOC-1987-AggarwalACS
- A Model for Hierarchical Memory (AA, BA, AKC, MS), pp. 305–314.
- ICLP-1987-Hermenegildo87 #execution #logic programming #precedence #source code
- Relating Goal-Scheduling, Precedence, and Memory Management in AND-Parallel Execution of Logic Programs (MVH), pp. 556–575.
- ICLP-1987-SatoSMRG87 #clustering #execution
- KL1 Execution Model for PIM Cluster with Shared Memory (MS, HS, AM, KR, AG), pp. 338–355.
- SLP-1987-Conery87 #logic programming #parallel #source code
- Binding Environments for Parallel Logic Programs in Non-Shared Memory Multiprocessors (JSC), pp. 457–467.
- SLP-1987-HausmanCH87 #multi #performance #prolog
- OR-Parallel Prolog Made Efficient on Shared Memory Multiprocessors (BH, AC, SH), pp. 69–79.
- SIGMOD-1986-Bitton #database #in memory #scalability
- The Effect of Large Main memory on Database Systems (DB), pp. 337–339.
- SIGMOD-1986-LehmanC #database #in memory #query
- Query Processing in Main Memory Database Management Systems (TJL, MJC), pp. 239–250.
- VLDB-1986-LehmanC #case study #database #in memory
- A Study of Index Structures for Main Memory Database Management Systems (TJL, MJC), pp. 294–303.
- ICALP-1986-DymondR #context-free grammar #parallel #recognition
- Parallel RAMs with Owned Global Memory and Deterministic Context-Free Language Recognition (PWD, WLR), pp. 95–104.
- OOPSLA-1986-Kaehler #object-oriented
- Virtual Memory on a Narrow Machine for an Object-Oriented Language (TK), pp. 87–106.
- STOC-1986-KarlinU #implementation #parallel #performance
- Parallel Hashing-An Efficient Implementation of Shared Memory (ARK, EU), pp. 160–168.
- ICLP-1986-Levy86a #execution
- Shared Memory Execution of Committed-choice Languages (JL), pp. 298–312.
- ICLP-1986-Robinson86 #pattern matching #prolog
- A Prolog Processor Based on a Pattern Matching Memory Device (IR), pp. 172–179.
- ICLP-1986-Tick86 #lisp #performance #prolog #source code
- Memory Performance of Lisp and Prolog Programs (ET), pp. 642–649.
- SLP-1986-BekkersCRU86 #garbage collection #implementation #logic programming #named #programming language #realtime
- MALI: A Memory with a Real-time Garbage Collector for Implementing Logic Programming Languages (YB, BC, OR, LU), pp. 258–264.
- SLP-1986-RossR86 #prolog
- Paging Strategy for Prolog Based Dynamic Virtual Memory (MLR, KR), pp. 46–57.
- SIGIR-1985-McGregor #knowledge base
- Generalized Associative Memory Devices: Their Place in Intelligent Knowledge Based Systems (DM), p. 226.
- POPL-1985-BernsteinPR #parallel #scheduling
- Optimal Scheduling of Arithmetic Operations in Parallel with Memory Accesses (DB, RYP, MR), pp. 325–333.
- SOSP-1985-FitzgeraldR #communication #integration
- The Integration of Virtual Memory Management and Interprocess Communication in Accent (RPF, RFR), pp. 13–14.
- SOSP-1985-MalkawiP #compilation #policy #source code
- Compiler Directed Memory Management Policy For Numerical Programs (MM, JHP), pp. 97–106.
- SIGMOD-1984-DeWittKOSSW #database #implementation #in memory
- Implementation Techniques for Main Memory Database Systems (DJD, RHK, FO, LDS, MS, DAW), pp. 1–8.
- POPL-1984-Murtagh #algol
- A Less Dynamic Memory Allocation Scheme for Algol-like Languages (TPM), pp. 283–289.
- DAC-1984-KawamuraTH #functional #verification
- Functional verification of memory circuits from mask artwork data (MK, HT, KH), pp. 228–234.
- DAC-1984-SchnurmannVP #automation #testing
- An automated system for testing LSI memory chips (HDS, LJV, RMP), pp. 454–458.
- STOC-1984-DolevMMU #fault
- Correcting Faults in Write-Once Memory (DD, DM, HGM, JDU), pp. 225–229.
- ILPC-1984-BekkersCRU84 #interpreter #prolog
- A Memory Management Machine for Prolog Interpreter (YB, BC, OR, LU), pp. 343–353.
- SLP-1984-Warren84 #flexibility #performance #prolog
- Efficient Prolog Memory Management for Flexible Control Strategies (DSW), pp. 198–202.
- PODS-1982-Maier #database #using
- Using Write-once Memory for Database Storage (DM), pp. 239–246.
- ASPLOS-1982-PollackCHKLR #ada
- Supporting Ada Memory Management in the iAPX-432 (FJP, GWC, DWH, KCK, KKL, JRR), pp. 117–131.
- ASPLOS-1982-Reed #on the
- On a General Property of Memory Mapping Tables (KR), pp. 81–86.
- ASPLOS-1982-Wilkes #hardware #implementation
- Hardware Support for Memory Protection: Capability Implementations (MVW), pp. 107–116.
- STOC-1982-RivestS #how #reuse
- How to Reuse a “Write-Once” Memory (RLR, AS), pp. 105–113.
- SOSP-1981-CarrH #algorithm #effectiveness #named
- WSClock — A Simple and Effective Algorithm for Virtual Memory Management (RWC, JLH), pp. 87–95.
- LISP-1980-White #lisp
- Address/Memory Management for a Gigantic LISP Environment (JW), pp. 119–127.
- ICSE-1978-Cook
- Measuring Memory Protection (DC), pp. 281–287.
- VLDB-1977-Eastlake #performance
- Tertiary Memory Access and Performance in the Datacomputer (DEEI), pp. 259–268.
- VLDB-1977-Heard
- A Direct Access Terabit Archival Memory (HGH), pp. 254–258.
- VLDB-1977-Nickerson #database #scalability
- Some Comments on Human Archival Memory as a Very Large Data Base (RSN), pp. 159–168.
- ICALP-1977-Alton #complexity #metric
- “Natural” Complexity Measures and Time versus Memory: Some Definitional Proposals (DAA), pp. 16–29.
- SOSP-1977-Masuda
- Effect of Program Localities on Memory Management Strategies (TM), pp. 117–124.
- VLDB-J-1975-LinSS76 #array #database #design #relational
- The Design of a Rotating Associative Array Memory for a Relational Database Management Application (CSL, DCPS, JMS), pp. 53–65.
- SIGMOD-1976-ShermanB #database #performance
- Performance of a Data Base Manager in a Virtual Memory System (SWS, RSB), p. 31.
- ICSE-1976-Smith #effectiveness #in memory #on the #set
- On the Effectiveness of Set Associative Page Mapping and Its Application to Main Memory Management (AJS), pp. 286–292.
- VLDB-1975-LinSS #array #database #design #relational
- The Design of a Rotating Associative Array Memory for a Relational Database Management Application (CSL, DCPS, JMS), pp. 453–455.
- VLDB-1975-Omahen #multi
- Estimating Response Time for Auxiliary Memory Configuartions with Multiple Movable-Head Disk Modules (KO), pp. 473–495.
- SOSP-1975-AgrawalaB #modelling #scheduling
- Models of Memory Scheduling (AKA, RMB), pp. 217–222.
- SIGFIDET-1974-CopelandS
- A High Level Data Sublanguage for a Context-Addressed Sequential Memory (GPC, SYWS), pp. 265–276.
- ICALP-1974-Weicker #turing machine
- Turing Machines with Associative Memory Access (RW), pp. 458–472.
- SOSP-1973-ChamberlinFL #multi
- A Page Allocation Strategy for Multiprogramming Systems with Virtual Memory (DDC, SHF, LYL), pp. 66–72.
- SOSP-1973-Scheffler
- Optimal Folding of a Paging Drum in a Three Level Memory System (LJS), pp. 58–65.
- STOC-1972-GareyGU #algorithm #analysis #worst-case
- Worst-Case Analysis of Memory Allocation Algorithms (MRG, RLG, JDU), pp. 143–150.
- SIGFIDET-1971-Bayer
- Binary B-Trees for Virtual Memory (RB), pp. 219–235.
- DAC-1971-KlaytonBL #detection #fault
- Fault detection and diagnosis of memory system faults (ARK, WAB, AIL), pp. 269–277.
- SOSP-1971-WinogradMH #operating system #simulation
- Simulation Studies of a Virtual Memory, Time Shared, Demand Paging Operating System (JW, SJM, RH), pp. 149–155.
- DAC-1970-BottorffSV #approach #automation #fault #problem #testing
- An automatic system approach to the problem of memory circuit testing & fault diagnosis (PSB, MES, FJV), pp. 95–99.
- SOSP-1969-BensoussanCD #multi
- The multics virtual memory (AB, CTC, RCD), pp. 30–42.
- SOSP-1967-DaleyD68 #multi #process
- Virtual Memory, Processes, and Sharing in MULTICS (RCD, JBD), pp. 306–312.