BibSLEIGH corpus
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Used together with:
chip (2)
memori (2)
dram (1)
reduct (1)
explor (1)

Stem ddr$ (all stems)

3 papers:

DACDAC-2013-MinJP #energy #named #optimisation #reduction
XDRA: exploration and optimization of last-level cache for energy reduction in DDR DRAMs (SMM, HJ, SP), p. 10.
DATEDATE-2013-MartinB #configuration management #integration
Configurable I/O integration to reduce system-on-chip time to market: DDR, PCIe examples (FM, PB), p. 169.
DACDAC-2008-KwonYHMCE #approach #memory management #parallel
A practical approach of memory access parallelization to exploit multiple off-chip DDR memories (WCK, SY, SMH, BM, KMC, SKE), pp. 447–452.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.