BibSLEIGH — Two approaches for developing generic components in VHDL

Vytautas Stuikys, Giedrius Ziberkas, Robertas Damasevicius, Giedrius Majauskas
Two approaches for developing generic components in VHDL
DATE, 2001.

DATE 2001

@inproceedings{DATE-2001-StuikysZDM,
	author        = "Vytautas Stuikys and Giedrius Ziberkas and Robertas Damasevicius and Giedrius Majauskas",
	booktitle     = "{Proceedings of the Sixth Conference on Design, Automation and Test in Europe}",
	doi           = "10.1145/367072.367987",
	isbn          = "0-7695-0993-2",
	pages         = "800",
	publisher     = "{ACM}",
	title         = "{Two approaches for developing generic components in VHDL}",
	year          = 2001,
}

Vytautas Stuikys, Giedrius Ziberkas, Robertas Damasevicius, Giedrius MajauskasTwo approaches for developing generic components in VHDLDATE, 2001.

Tags:

Vytautas Stuikys, Giedrius Ziberkas, Robertas Damasevicius, Giedrius Majauskas
Two approaches for developing generic components in VHDL
DATE, 2001.