Rethinking on-chip DRAM cache for simultaneous performance and energy optimization
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Fazal Hameed, Jerónimo Castrillón
Rethinking on-chip DRAM cache for simultaneous performance and energy optimization
DATE, 2017.

DATE 2017
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@inproceedings{DATE-2017-HameedC,
	author        = "Fazal Hameed and Jerónimo Castrillón",
	booktitle     = "{Proceedings of the 21st Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.23919/DATE.2017.7927017",
	isbn          = "978-3-9815370-8-6",
	pages         = "362--367",
	publisher     = "{IEEE}",
	title         = "{Rethinking on-chip DRAM cache for simultaneous performance and energy optimization}",
	year          = 2017,
}


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