Exploiting transistor-level reconfiguration to optimize combinational circuits
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Michael Raitza, Akash Kumar 0001, Marcus Völp, Dennis Walter, Jens Trommer, Thomas Mikolajick, Walter M. Weber
Exploiting transistor-level reconfiguration to optimize combinational circuits
DATE, 2017.

DATE 2017
DBLP
Scholar
ACM DL
DOI
Full names Links ISxN
@inproceedings{DATE-2017-RaitzaKVWTMW,
	author        = "Michael Raitza and Akash Kumar 0001 and Marcus Völp and Dennis Walter and Jens Trommer and Thomas Mikolajick and Walter M. Weber",
	booktitle     = "{Proceedings of the 21st Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.23919/DATE.2017.7927013",
	isbn          = "978-3-9815370-8-6",
	pages         = "338--343",
	publisher     = "{IEEE}",
	title         = "{Exploiting transistor-level reconfiguration to optimize combinational circuits}",
	year          = 2017,
}


Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.