Chaochao Feng, Daheng Yue, Zhenyu Zhao, Zhuofan Liao
A parameterized timing-aware flip-flop merging algorithm for clock power reduction
DATE, 2018.
@inproceedings{DATE-2018-FengYZL,
author = "Chaochao Feng and Daheng Yue and Zhenyu Zhao and Zhuofan Liao",
booktitle = "{Proceedings of the 22nd Conference and Exhibition on Design, Automation and Test in Europe}",
doi = "10.23919/DATE.2018.8342131",
isbn = "978-3-9819263-0-9",
pages = "881--884",
publisher = "{IEEE}",
title = "{A parameterized timing-aware flip-flop merging algorithm for clock power reduction}",
year = 2018,
}
