Accelerating Itemset Sampling using Satisfiability Constraints on FPGA
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter

Mael Gueguen, Olivier Sentieys, Alexandre Termier
Accelerating Itemset Sampling using Satisfiability Constraints on FPGA
DATE, 2019.

DATE 2019
DBLP
Scholar
DOI
Full names Links ISxN
@inproceedings{DATE-2019-GueguenST,
	author        = "Mael Gueguen and Olivier Sentieys and Alexandre Termier",
	booktitle     = "{Proceedings of the 23rd Conference and Exhibition on Design, Automation and Test in Europe}",
	doi           = "10.23919/DATE.2019.8714932",
	isbn          = "978-3-9819263-2-3",
	pages         = "1046--1051",
	publisher     = "{IEEE}",
	title         = "{Accelerating Itemset Sampling using Satisfiability Constraints on FPGA}",
	year          = 2019,
}


Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.