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Travelled to:
1 × Austria
1 × Czech Republic
1 × Poland
1 × Switzerland
1 × USA
Collaborated with:

Talks about:
modulo (3) deduct (3) superdeduct (1) represent (1) unbound (1) system (1) prover (1) length (1) experi (1) admiss (1)

Person: Guillaume Burel

DBLP DBLP: Burel:Guillaume

Contributed to:

RTA-TLCA 20142014
CADE 20112011
CSL 20102010
LICS 20082008
CSL 20072007

Wrote 5 papers:

RTA-TLCA-2014-Burel
Cut Admissibility by Saturation (GB), pp. 124–138.
CADE-2011-Burel #deduction
Experimenting with Deduction Modulo (GB), pp. 162–176.
CSL-2010-Burel #deduction #proving
Embedding Deduction Modulo into a Prover (GB), pp. 155–169.
LICS-2008-Burel #deduction #first-order #representation #type system #using
A First-Order Representation of Pure Type Systems Using Superdeduction (GB), pp. 253–263.
CSL-2007-Burel #bound #deduction
Unbounded Proof-Length Speed-Up in Deduction Modulo (GB), pp. 496–511.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.