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Travelled to:
1 × France
Collaborated with:
A.Baniasadi
Talks about:
branchless (1) processor (1) predict (1) embed (1) cycl (1)

Person: Kaveh Jokar Deris

DBLP DBLP: Deris:Kaveh_Jokar

Contributed to:

SAC 20062006

Wrote 1 papers:

SAC-2006-DerisB #embedded #predict
Branchless cycle prediction for embedded processors (KJD, AB), pp. 928–932.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.