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Travelled to:
1 × USA
Collaborated with:
B.R.Rau M.Lee M.S.Schlansker
Talks about:
softwar (1) pipelin (1) regist (1) alloc (1) loop (1)

Person: Parthasarathy P. Tirumalai

DBLP DBLP: Tirumalai:Parthasarathy_P=

Contributed to:

PLDI 19921992

Wrote 1 papers:

PLDI-1992-RauLTS #pipes and filters
Register Allocation for Software Pipelined Loops (BRR, ML, PPT, MSS), pp. 283–299.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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