Travelled to:
3 × USA
Collaborated with:
S.A.Mahlke B.R.Rau R.Johnson M.Lee P.P.Tirumalai W.Y.Chen W.W.Hwu
Talks about:
superscalar (1) architectur (1) processor (1) sentinel (1) softwar (1) schedul (1) pipelin (1) control (1) regist (1) reduct (1)
Person: Michael S. Schlansker
DBLP: Schlansker:Michael_S=
Contributed to:
Wrote 3 papers:
- PLDI-1999-SchlanskerMJ #architecture #branch #optimisation #reduction
- Control CPR: A Branch Height Reduction Optimization for EPIC Architectures (MSS, SAM, RJ), pp. 155–168.
- ASPLOS-1992-MahlkeCHRS #scheduling
- Sentinel Scheduling for VLIW and Superscalar Processors (SAM, WYC, WmWH, BRR, MSS), pp. 238–247.
- PLDI-1992-RauLTS #pipes and filters
- Register Allocation for Software Pipelined Loops (BRR, ML, PPT, MSS), pp. 283–299.