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Used together with:
analog (1)
equal (1)
synthesi (1)
filter (1)
redesign (1)

Stem adsl$ (all stems)

1 papers:

DACDAC-2000-PhelpsKRCH #case study #synthesis
A case study of synthesis for industrial-scale analog IP: redesign of the equalizer/filter frontend for an ADSL CODEC (RP, MK, RAR, LRC, JRH), pp. 1–6.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.