7 papers:
DAC-2012-WeiLKP #benchmark #hardware #metric- Hardware Trojan horse benchmark via optimal creation and placement of malicious circuitry (SW, KL, FK, MP), pp. 90–95.
DATE-2012-SharmaCAHCD #power management #variability- Ultra low power litho friendly local assist circuitry for variability resilient 8T SRAM (VS, SC, MA, JH, FC, WD), pp. 1042–1047.
- DATE-2010-Mirza-AghatabarBG #algorithm #pipes and filters
- Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules (MMA, MAB, SKG), pp. 1249–1254.
- DATE-2007-DasM #analysis
- Sensitivity analysis for fault-analysis and tolerance in RF front-end circuitry (TD, PRM), pp. 1277–1282.
ICPR-1996-AleksandrovskyWGLG #algorithm #sequence- An algorithm derived from thalamocortical circuitry stores and retrieves temporal sequences (BA, JW, AG, GL, RG), pp. 550–554.
- DAC-1995-KarkowskiO
- Retiming Synchronous Circuitry with Imprecise Delays (IK, RHJMO), pp. 322–326.
- DAC-1993-PapaefthymiouR #named
- TIM: A Timing Package for Two-Phase, Level-Clocked Circuitry (MCP, KHR), pp. 497–502.
