Stem yield$ (all stems)

97 papers:

CASE-2015-ChengTLCH #algorithm #modelling #network #optimisation

Modeling and optimizing tensile strength and yield point on steel bar by artificial neural network with evolutionary algorithm (CKC, JTT, TTL, JHC, KSH), pp. 1562–1563.

DAC-2015-Bowen #performance #quality

Walking a thin line: performance and quality grading vs. yield overcut (CB), p. 2.

DAC-2015-RamprasathV #algorithm #optimisation #performance #statistics

An efficient algorithm for statistical timing yield optimization (SR, VV), p. 6.

DATE-2015-AfacanBPDB #hybrid #monte carlo

A hybrid Quasi Monte Carlo method for yield aware analog circuit sizing tool (EA, GB, AEP, GD, IFB), pp. 1225–1228.

DAC-2014-FangYZL #estimation #named #performance

BMF-BD: Bayesian Model Fusion on Bernoulli Distribution for Efficient Yield Estimation of Integrated Circuits (CF, FY, XZ, XL), p. 6.

DATE-2014-ChenLLSHC #3d

Yield and timing constrained spare TSV assignment for three-dimensional integrated circuits (YGC, KYL, MCL, YS, WKH, SCC), pp. 1–4.

DATE-2014-RanaC #analysis #named #reduction #scalability #simulation

SSFB: A highly-efficient and scalable simulation reduction technique for SRAM yield analysis (MR, RC), pp. 1–6.

DATE-2014-ZhangYW #analysis #performance #problem

Efficient high-sigma yield analysis for high dimensional problems (MZ, ZY, YW), pp. 1–6.

LDTA-J-2011-SauthoffG #analysis #domain-specific language #optimisation #programming

Yield grammar analysis and product optimization in a domain-specific language for dynamic programming (GS, RG), pp. 2–22.

DATE-2013-GaoBW #paradigm #performance

A new paradigm for trading off yield, area and performance to enhance performance per wafer (YG, MAB, YW), pp. 1753–1758.

DATE-2013-YaoYW #adaptation #analysis #modelling #online #performance

Efficient importance sampling for high-sigma yield analysis with adaptive online surrogate modeling (JY, ZY, YW), pp. 1291–1296.

SIGIR-2013-WebberBLO #classification #effectiveness #evaluation #testing

Sequential testing in classifier evaluation yields biased estimates of effectiveness (WW, MB, DDL, DWO), pp. 933–936.

DAC-2012-KanjJLHN #estimation #multi

Yield estimation via multi-cones (RK, RVJ, ZL, JH, SRN), pp. 1107–1112.

DAC-2012-KuoHCKC #design #monte carlo #performance

Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits (CCK, WYH, YHC, JFK, YKC), pp. 1113–1118.

DATE-2012-HamoudaAK #automation #image #modelling #novel

AIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield (AYH, MA, KSK), pp. 1603–1608.

DATE-2012-LiuMG #estimation #performance #problem

A fast analog circuit yield estimation method for medium and high dimensional problems (BL, JM, GGEG), pp. 751–756.

DATE-2012-MakosiejTVA #design #embedded #optimisation #power management

Stability and yield-oriented ultra-low-power embedded 6T SRAM cell design optimization (AM, OT, AV, AA), pp. 93–98.

DATE-2012-NazinMR #optimisation

Yield optimization for radio frequency receiver at system level (SAN, DM, AR), pp. 848–851.

CSCW-2012-DowKKH

Shepherding the crowd yields better work (SD, APK, SRK, BH), pp. 1013–1022.

DATE-2011-AitkenYF #correlation #modelling #parametricity

Correlating models and silicon for improved parametric yield (RA, GY, DF), pp. 1159–1163.

DATE-2011-AsenovBC #aspect-oriented #statistics

Statistical aspects of NBTI/PBTI and impact on SRAM yield (AA, ARB, BC), pp. 1480–1485.

DATE-2011-MirandaZDR #logic #modelling #variability

Variability aware modeling for yield enhancement of SRAM and logic (MM, PZ, PD, PR), pp. 1153–1158.

ICALP-v1-2011-Nonner #clique #clustering #graph

Clique Clustering Yields a PTAS for max-Coloring Interval Graphs (TN), pp. 183–194.

SEKE-2011-AlencarTSDC

Maximizing the Financial Benefits Yielded by IT Projects While Ensuring their Strategic Fit (AJA, GT, EAS, AFdSD, ALC), pp. 288–295.

LDTA-2011-GiegerichS #analysis #compilation

Yield grammar analysis in the Bellman’s GAP compiler (RG, GS), p. 7.

DAC-2010-BeeceXVZL #parametricity

Transistor sizing of custom high-performance digital circuits with parametric yield considerations (DKB, JX, CV, VZ, YL), pp. 781–786.

DAC-2010-GongYSKRH #constraints #estimation #named #parametricity #performance

QuickYield: an efficient global-search based parametric yield estimation with performance constraints (FG, HY, YS, DK, JR, LH), pp. 392–397.

DAC-2010-HuangX #performance #process #scheduling

Performance yield-driven task allocation and scheduling for MPSoCs under process variation (LH, QX), pp. 326–331.

DAC-2010-KuoCTCL #approach #behaviour

Behavior-level yield enhancement approach for large-scaled analog circuits (CCK, YLC, ICT, LYC, CNJL), pp. 903–908.

DAC-2010-LiuYHSK #generative #optimisation

Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances (YL, MY, KH, TS, YK), pp. 909–912.

DAC-2010-ZhangBPLWMM #correlation

Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement (JZ, SB, NP, AL, HSPW, GDM, SM), pp. 889–892.

DATE-2010-ChenO #adaptation #effectiveness #identification

Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme (MC, AO), pp. 63–68.

DATE-2010-Flautner #performance

Optimize your power and performance yields and regain those sleepless nights (KF), p. 1006.

DATE-2010-JaffariA #estimation #monte carlo

Practical Monte-Carlo based timing yield estimation of digital circuits (JJ, MA), pp. 807–812.

DATE-2010-LiuFG #optimisation #performance

An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique (BL, FVF, GGEG), pp. 1106–1111.

DATE-2010-Mirza-AghatabarBG #algorithm #pipes and filters

Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules (MMA, MAB, SKG), pp. 1249–1254.

DATE-2010-Mueller-GritschnederG #specification

Computation of yield-optimized Pareto fronts for analog integrated circuit specifications (DMG, HG), pp. 1088–1093.

DATE-2010-QaziTDSC #analysis #performance #reduction

Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis (MQ, MT, LD, DS, AC), pp. 801–806.

DATE-2010-ZuberMDZJ #analysis #statistics

Statistical SRAM analysis for yield enhancement (PZ, MM, PD, KvdZ, JHJ), pp. 57–62.

CASE-2009-FanL #effectiveness #ranking

A Bayesian Ranking Scheme for supporting cost-effective yield diagnosis services (CMF, YPL), pp. 427–432.

CASE-2009-SuCFTJKL #approach #identification #information management #novel #ontology

A novel ontology-based knowledge engineering approach for yield symptom identification in semiconductor manufacturing (FHS, SCC, CMF, YJT, JJ, CPK, CYL), pp. 433–438.

DAC-2009-LiS #algorithm #optimisation #robust

Yield-driven iterative robust circuit optimization algorithm (YL, VS), pp. 599–604.

DAC-2009-PanKOMC #process

Selective wordline voltage boosting for caches to manage yield under process variations (YP, JK, SO, GM, SWC), pp. 57–62.

DATE-2009-PanKK #multi #reliability

Improving yield and reliability of chip multiprocessors (AP, OK, SK), pp. 490–495.

DATE-2009-SreedharK #analysis #on the

On linewidth-based yield analysis for nanometer lithography (AS, SK), pp. 381–386.

ASPLOS-2009-WegielK #predict

Dynamic prediction of collection yield for managed runtimes (MW, CK), pp. 289–300.

DAC-2008-Abu-RahmaCWCYA #estimation #statistics

A methodology for statistical estimation of read access yield in SRAMs (MHAR, KC, JW, ZC, SSY, MA), pp. 205–210.

DAC-2008-JeongKPY #power management #reduction

Dose map and placement co-optimization for timing yield enhancement and leakage power reduction (KJ, ABK, CHP, HY), pp. 516–521.

DAC-2008-LiASR #array #design #memory management #modelling #probability #random #statistics

Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement (JL, CA, SSS, KR), pp. 278–283.

DAC-2008-WangLZTYTCN #scheduling

Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays (YW, WSL, XZ, JT, CY, JT, WC, JN), pp. 223–226.

DATE-2008-AliWWB #approach #behaviour #modelling #performance

A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits (SA, RW, PRW, ADB), pp. 152–157.

DATE-2008-GielenWMLMKGRN #challenge #reliability

Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies (GGEG, PHNDW, EM, JL, JMM, BK, GG, RR, MN), pp. 1322–1327.

DATE-2008-XiongZV #incremental

Incremental Criticality and Yield Gradients (JX, VZ, CV), pp. 1130–1135.

CASE-2007-PopaLMDS #assembly #automation

High Yield Automated MEMS Assembly (DOP, WHL, RM, AND, HES), pp. 1099–1104.

CASE-2007-SaeediKEMP #automation #process #self

Automation and yield of micron-scale self-assembly processes (ES, SSK, JRE, DRM, BAP), pp. 375–380.

CASE-2007-YipLL #process

Forecasting Final/Class Yield Based on Fabrication Process E-Test and Sort Data (WKY, KGL, WJL), pp. 478–483.

DAC-2007-ChoXPP #named

TROY: Track Router with Yield-driven Wire Planning (MC, HX, RP, DZP), pp. 55–58.

DAC-2007-LiP #correlation #multi #parametricity #performance

Efficient Parametric Yield Extraction for Multiple Correlated Non-Normal Performance Distributions of Analog/RF Circuits (XL, LTP), pp. 928–933.

DATE-2007-AzzoniBDFGV #optimisation

Yield-aware placement optimization (PA, MB, ND, FF, CG, WV), pp. 1232–1237.

DATE-2007-HsiehLB #detection #fault #reduction

Reduction of detected acceptable faults for yield improvement via error-tolerance (TYH, KJL, MAB), pp. 1599–1604.

DAC-2006-DavoodiS #optimisation #variability

Variability driven gate sizing for binning yield optimization (AD, AS), pp. 959–964.

DAC-2006-LuoSSKC

An IC manufacturing yield model considering intra-die variations (JL, SS, QS, JK, CC), pp. 749–754.

DAC-2006-PandeyG #communication #constraints #scalability #statistics #synthesis

Statistical on-chip communication bus synthesis and voltage scaling under timing yield constraint (SP, MG), pp. 663–668.

DAC-2006-TiwaryTR #design #generative

Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration (SKT, PKT, RAR), pp. 31–36.

DATE-2006-BuhlerKBHSSPR #design #process

DFM/DFY design for manufacturability and yield — influence of process variations in digital, analog and mixed-signal circuit design (MB, JK, JB, JH, US, RS, MP, AR), pp. 387–392.

DATE-2006-IizukaIA #layout #optimisation

Timing-driven cell layout de-compaction for yield optimization by critical area minimization (TI, MI, KA), pp. 884–889.

OSDI-2006-Werner-AllenLJLW #monitoring #network

Fidelity and Yield in a Volcano Monitoring Sensor Network (GWA, KL, JJ, JL, MW), pp. 381–396.

DAC-2005-ManiDO #algorithm #constraints #performance #statistics

An efficient algorithm for statistical minimization of total power under timing yield constraints (MM, AD, MO), pp. 309–314.

DAC-2005-SrivastavaSASBD #correlation #estimation #parametricity #performance #power management

Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performance (AS, SS, KA, DS, DB, SWD), pp. 535–540.

DATE-2005-DattaBMBR #design #modelling #pipes and filters #process #statistics

Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies (AD, SB, SM, NB, KR), pp. 926–931.

DATE-2005-SuCP #configuration management #using

Yield Enhancement of Digital Microfluidics-Based Biochips Using Space Redundancy and Local Reconfiguration (FS, KC, VKP), pp. 1196–1201.

DAC-2004-ChoiPR #algorithm #novel #process

Novel sizing algorithm for yield improvement under process variation in nanometer technology (SHC, BCP, KR), pp. 454–459.

DAC-2004-NajmM #analysis #statistics

Statistical timing analysis based on a timing yield model (FNN, NM), pp. 460–465.

DAC-2004-RajVW #process

A methodology to improve timing yield in the presence of process variations (SR, SBKV, JMW), pp. 448–453.

DAC-2004-RaoDBS #estimation #parametricity #variability

Parametric yield estimation considering leakage variability (RRR, AD, DB, DS), pp. 442–447.

DAC-2004-StrojwasCGHKLNPT #fault #question

When IC yield missed the target, who is at fault? (AJS, MC, VG, JH, JK, ML, WN, DP, MT), p. 80.

DAC-2003-JessKNOV #parametricity #predict #statistics

Statistical timing for parametric yield prediction of digital integrated circuits (JAGJ, KK, SRN, RHJMO, CV), pp. 932–937.

DATE-2003-SmedtG #bound #design #named

HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits (BDS, GGEG), pp. 10256–10263.

DAC-2002-AbramoviciSE #embedded #using

Using embedded FPGAs for SoC yield improvement (MA, CES, ME), pp. 713–724.

DAC-2002-Zorian #framework

Embedding infrastructure IP for SOC yield improvement (YZ), pp. 709–712.

DAC-2001-SchenkelPZSGA #analysis #optimisation

Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search (FS, MP, SZ, RS, HEG, KA), pp. 858–863.

DATE-2000-BouraiS #layout #optimisation

Layout Compaction for Yield Optimization via Critical Area Minimization (YB, CJRS), pp. 122–125.

DATE-2000-Veelenturf #embedded #reliability #tool support

The Road to Better Reliability and Yield Embedded DfM Tools (KV), pp. 67–68.

DATE-2000-Zorian #embedded #scalability #trade-off

Yield Improvement and Repair Trade-Off for Large Embedded Memories (YZ), pp. 69–70.

STOC-2000-Achlioptas #bound #random #satisfiability

Setting 2 variables at a time yields a new lower bound for random 3-SAT (extended abstract) (DA), pp. 28–37.

ICALP-1999-AndreevBCR #bound #branch #pseudo #set #source code

Small Pseudo-Random Sets Yield Hard Functions: New Tight Explict Lower Bounds for Branching Programs (AEA, JLB, AEFC, JDPR), pp. 179–189.

IFL-1999-Groningen #functional #lazy evaluation #multi #optimisation #recursion #tuple

Optimising Recursive Functions Yielding Multiple Results in Tuples in a Lazy Functional Language (JHGvG), pp. 59–76.

DAC-1996-BamjiM #algorithm #network #optimisation

Enhanced Network Flow Algorithm for Yield Optimization (CB, EM), pp. 746–751.

DAC-1996-LiM #adaptation #linear #modelling #parametricity #using

Computing Parametric Yield Adaptively Using Local Linear Models (ML, LSM), pp. 831–836.

EDAC-1994-WangD #approximate #linear #optimisation #performance #using

An Efficient Yield Optimization Method Using A Two Step Linear Approximation of Circuit Performance (ZW, SWD), pp. 567–571.

DAC-1992-CongHK

Net Partitions Yield Better Module Partitions (JC, LWH, ABK), pp. 47–52.

DAC-1990-WeyDC #design

Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement (CLW, JD, TYC), pp. 327–332.

STOC-1990-EvenR #distributed #network

The Use of a Synchronizer Yields Maximum Computation Rate in Distributed Networks (Extended Abstract) (SE, SR), pp. 95–105.

DAC-1989-Strojwas #design

Design for Manufacturability and Yield (AJS), pp. 454–459.

DAC-1987-Wey #array #design #logic #on the #programmable

On Yield Consideration for the Design of Redundant Programmable Logic Arrays (CLW), pp. 622–628.

DAC-1985-PerryMP #analysis #modelling

Yield analysis modeling (SP, MM, DJP), pp. 425–428.

LFP-1984-Bellegarde #sequence #term rewriting

Rewriting Systems on FP Expressions that Reduce the Number of Sequences They Yield (FB), pp. 63–73.