BibSLEIGH corpus
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Used together with:
design (4)
simul (3)
cad (3)
model (3)
top (2)

Stem microsystem$ (all stems)

9 papers:

A 16-bit mixed-signal microsystem with integrated CMOS-MEMS clock reference (RMS, EDM, MSM, FHG, KLK, MRG, RBB), pp. 520–525.
DATEDATE-2003-McCorquodaleGKMSB #challenge #design #top-down
A Top-Down Microsystems Design Methodology and Associated Challenges (MSM, FHG, KLK, EDM, RMS, RBB), pp. 20292–20296.
DATEDATE-1998-LubaszewskiCC #approach #problem #testing
Microsystems Testing: an Approach and Open Problems (ML, ÉFC, BC), pp. 524–528.
DATEDATE-1998-NeulBLSHW #approach #component #modelling #simulation
A Modeling Approach to Include Mechanical Microsystem Components into the System Simulation (RN, UB, GL, PS, JH, SW), pp. 510–517.
CAD and Foundries for Microsystems (JMK, BC, HB, PD, AP, VS, MR, KH, MG), pp. 674–679.
DATEEDTC-1997-LangDG #automation #design #modelling #parametricity #top-down
Automatic transfer of parametric FEM models into CAD-layout formats for top-down design of microsystems (ML, DD, MG), pp. 200–204.
DATEEDTC-1997-RomanowiczLLRABMP #hardware #modelling #simulation #transducer #using
Modeling and simulation of electromechanical transducers in microsystems using an analog hardware description language (BR, ML, PL, PR, HPA, AB, VM, FP), pp. 119–123.
DATEEDTC-1997-WunscheCSW #design #using
Microsystem design using simulator coupling (SW, CC, PS, FW), pp. 113–118.
CAD Methodology for the Design of UltraSPARC-I Microprocessor at Sun Microsystems Inc (AC, AA, JB, PD, PD, PD, MD, TD, MD, PF, OG, DG, SG, JI, LL, JM, MM, SM, PP, AP, RP, SR, NR, PS, SS, RS, BS, WV, MW, PY, RKY, JZ, GBZ), pp. 19–22.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.