BibSLEIGH
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Used together with:
clock (1)
effici (1)
circuit (1)
level (1)
larg (1)

Stem minarea$ (all stems)

1 papers:

DATEDATE-1998-MaheshwariS #performance #scalability
Efficient Minarea Retiming of Large Level-Clocked Circuits (NM, SSS), pp. 840–845.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.