6 papers:
- DATE-2014-LinWCH #logic
- Rewiring for threshold logic circuit minimization (CCL, CYW, YCC, CYH), pp. 1–6.
- DAC-2010-JoseHMH #robust
- Rewiring for robustness (MJ, YH, RM, LH), pp. 469–474.
- DAC-2010-YangLW #complexity #fault #named
- ECR: a low complexity generalized error cancellation rewiring scheme (XY, TKL, YLW), pp. 511–516.
- DATE-2009-LinW #using
- Rewiring using IRredundancy Removal and Addition (CCL, CYW), pp. 324–327.
- ICML-2007-GuoHFX #approach #modelling #network
- Recovering temporally rewiring networks: a model-based approach (FG, SH, WF, EPX), pp. 321–328.
- DAC-2000-ChangCSM #detection #functional #performance #symmetry #using
- Fast post-placement rewiring using easily detectable functional symmetries (CWJC, CKC, PS, MMS), pp. 286–289.