BibSLEIGH
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Used together with:
fault (1)
simul (1)
effici (1)
circuit (1)
synchron (1)

Stem torsim$ (all stems)

1 papers:

DATEEDAC-1994-GaiMR #fault #named #performance
TORSIM: An Efficient Fault Simulator for Synchronous Sequential Circuits (SG, PLM, MSR), pp. 46–50.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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