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Used together with:
dual (3)
leakag (2)
assign (2)
circuit (1)
tradeoff (1)

Stem tox$ (all stems)

3 papers:

DATEDATE-2006-AmelifardFP #using
Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using Dual-Vt and Dual-Tox assignment (BA, FF, MP), pp. 995–1000.
DACDAC-2004-SultaniaSS #trade-off
Tradeoffs between date oxide leakage and delay for dual Tox circuits (AKS, DS, SSS), pp. 761–766.
DATEDATE-v1-2004-LeeDBS #power management
Simultaneous State, Vt and Tox Assignment for Total Standby Power Minimization (DL, HD, DB, DS), pp. 494–499.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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