BibSLEIGH
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Used together with:
bdds (1)
power (1)
use (1)
properti (1)
symbol (1)

Stem verifiy$ (all stems)

1 papers:

CAVCAV-1999-BiereCRZ #model checking #safety #using
Verifiying Safety Properties of a Power PC Microprocessor Using Symbolic Model Checking without BDDs (AB, EMC, RR, YZ), pp. 60–71.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.