Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency
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Vinay K. Chippa, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Srimat T. Chakradhar
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency
DAC, 2010.

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@inproceedings{DAC-2010-ChippaMRRC,
	author        = "Vinay K. Chippa and Debabrata Mohapatra and Anand Raghunathan and Kaushik Roy and Srimat T. Chakradhar",
	booktitle     = "{Proceedings of the 47th Design Automation Conference}",
	doi           = "10.1145/1837274.1837411",
	isbn          = "978-1-4503-0002-5",
	pages         = "555--560",
	publisher     = "{ACM}",
	title         = "{Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency}",
	year          = 2010,
}

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