Satish Ganesan, Ranga Vemuri
An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement
DATE, 2000.
@inproceedings{DATE-2000-GanesanV00a,
author = "Satish Ganesan and Ranga Vemuri",
booktitle = "{Proceedings of the Fifth Conference on Design, Automation and Test in Europe}",
doi = "10.1109/DATE.2000.840290",
isbn = "0-7695-0537-6",
pages = "320--325",
publisher = "{IEEE Computer Society}",
title = "{An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement}",
year = 2000,
}