BibSLEIGH
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Travelled to:
1 × France
Collaborated with:
R.Vemuri
Talks about:
reconfigur (1) techniqu (1) partial (1) tempor (1) partit (1) latenc (1) integr (1) improv (1) design (1)

Person: Satish Ganesan

DBLP DBLP: Ganesan:Satish

Contributed to:

DATE 20002000

Wrote 1 papers:

DATE-2000-GanesanV00a #clustering #configuration management #design #latency
An Integrated Temporal Partitioning and Partial Reconfiguration Technique for Design Latency Improvement (SG, RV), pp. 320–325.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.